Integrated Circuits (ICs)

SN74AC563PWR

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Texas Instruments

OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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Integrated Circuits (ICs)

SN74AC563PWR

Active

Texas Instruments

OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74AC563PWR

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low	24 mA
Delay Time - Propagation	4.6 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	20-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
Supplier Device Package	20-TSSOP
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

SN74AC563 Series

Octal D-Type Transparent Latches With 3-State Outputs

Part	Package / Case [y]	Package / Case	Package / Case [x]	Mounting Type	Delay Time - Propagation	Current - Output High, Low	Output Type	Independent Circuits	Voltage - Supply [Min]	Voltage - Supply [Max]	Circuit [custom]	Circuit [custom]	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Logic Type	Package / Case [y]	Package / Case	Package / Case
Texas Instruments SN74AC563PW	4.4 mm	20-TSSOP	0.173 in	Surface Mount	4.6 ns	24 mA	Tri-State	1	2 V	6 V	8	8	20-TSSOP	85 °C	-40 °C	D-Type Transparent Latch
Texas Instruments SN74AC563DW	0.295 in	20-SOIC		Surface Mount	4.6 ns	24 mA	Tri-State	1	2 V	6 V	8	8	20-SOIC	85 °C	-40 °C	D-Type Transparent Latch	7.5 mm
Texas Instruments SN74AC563N		20-DIP		Through Hole	4.6 ns	24 mA	Tri-State	1	2 V	6 V	8	8	20-PDIP	85 °C	-40 °C	D-Type Transparent Latch		7.62 mm	0.3 in
Texas Instruments SN74AC563DWR	0.295 in	20-SOIC		Surface Mount	4.6 ns	24 mA	Tri-State	1	2 V	6 V	8	8	20-SOIC	85 °C	-40 °C	D-Type Transparent Latch	7.5 mm
Texas Instruments SN74AC563PWR	4.4 mm	20-TSSOP	0.173 in	Surface Mount	4.6 ns	24 mA	Tri-State	1	2 V	6 V	8	8	20-TSSOP	85 °C	-40 °C	D-Type Transparent Latch
Texas Instruments CD74AC563EG4		20-DIP		Through Hole	3 ns	24 mA	Tri-State	1	1.5 V	5.5 V	8	8	20-PDIP	125 °C	-55 °C	D-Type Transparent Latch		7.62 mm	0.3 in
Texas Instruments CD74AC563E		20-DIP		Through Hole	3 ns	24 mA	Tri-State	1	1.5 V	5.5 V	8	8	20-PDIP	125 °C	-55 °C	D-Type Transparent Latch		7.62 mm	0.3 in
Texas Instruments SN74AC563PWLE	4.4 mm	20-TSSOP	0.173 in	Surface Mount	4.6 ns	24 mA	Tri-State	1	2 V	6 V	8	8	20-TSSOP	85 °C	-40 °C	D-Type Transparent Latch
Texas Instruments SN74AC563DBR		20-SSOP		Surface Mount	4.6 ns	24 mA	Tri-State	1	2 V	6 V	8	8	20-SSOP	85 °C	-40 °C	D-Type Transparent Latch
Texas Instruments SN74AC563DWRG4	0.295 in	20-SOIC		Surface Mount	4.6 ns	24 mA	Tri-State	1	2 V	6 V	8	8	20-SOIC	85 °C	-40 °C	D-Type Transparent Latch	7.5 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.48
	Digi-Reel®	1	$ 1.48
	Tape & Reel (TR)	2000	$ 0.84
		4000	$ 0.82
		6000	$ 0.81
		10000	$ 0.80
Texas Instruments	LARGE T&R	1	$ 1.34
		100	$ 1.11
		250	$ 0.80
		1000	$ 0.60

Description

General part information

SN74AC563 Series

The ’AC563 devices are octal D-type transparent latches with 3-state outputs. When the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverse logic levels set up at the D inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

(OE)\ does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Documents

Technical documentation and resources