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Technical Specifications
Parameters and characteristics for this part
| Specification | DS92CK16TMTCX |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 125 MHz |
| Input | BLVDS |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | CMOS |
| Package / Case | 24-TSSOP |
| Package / Case | 0.173 in, 4.4 mm |
| Ratio - Input:Output [custom] | 1:6 |
| Supplier Device Package | 24-TSSOP |
| Type | Clock Buffer/Bus Transceiver |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
DS92CK16 Series
The DS92CK16 1 to 6 Clock Buffer/Bus Transceiver is a one to six CMOS differential clock distribution device utilizing Bus Low Voltage Differential Signaling (BLVDS) technology. This clock distribution device is designed for applications requiring ultra low power dissipation, low noise, and high data rates. The BLVDS side is a transceiver with a separate channel acting as a return/source clock.
The DS92CK16 accepts LVDS (300 mV typical) differential input levels, and translates them to 3V CMOS output levels. An output enable pinOE, when high, forces all CLKOUTpins high.
The device can be used as a source synchronous driver. The selection of the source driving is controlled by the CrdCLKINandDEpins. This device can be the master clock, driving the inputs of other clock I/O pins in a multipoint environment. Easy master/slave clock selection is achieved along a backplane.
Documents
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