DS92CK16 Series

3-V BLVDS 1 to 6 clock buffer/bus transceiver

Catalog

3-V BLVDS 1 to 6 clock buffer/bus transceiver

Part	Frequency - Max [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Ratio - Input:Output [custom]	Voltage - Supply [Max]	Voltage - Supply [Min]	Supplier Device Package	Output	Mounting Type	Package / Case	Package / Case	Number of Circuits	Type	Input
Texas Instruments DS92CK16TMTC	125 MHz	85 °C	-40 °C	1:6	3.6 V	3 V	24-TSSOP	CMOS	Surface Mount	24-TSSOP	0.173 in 4.4 mm	1	Clock Buffer/Bus Transceiver	BLVDS
Texas Instruments DS92CK16TMTCX	125 MHz	85 °C	-40 °C	1:6	3.6 V	3 V	24-TSSOP	CMOS	Surface Mount	24-TSSOP	0.173 in 4.4 mm	1	Clock Buffer/Bus Transceiver	BLVDS
Texas Instruments DS92CK16TMTC/NOPB	125 MHz	85 °C	-40 °C	1:6	3.6 V	3 V	24-TSSOP	CMOS	Surface Mount	24-TSSOP	0.173 in 4.4 mm	1	Clock Buffer/Bus Transceiver	BLVDS

Catalog

3-V BLVDS 1 to 6 clock buffer/bus transceiver

Key Features

• Master/Slave Clock Selection in a Backplane Application125 MHz Operation (Typical)100 ps Duty Cycle Distortion (Typical)50 ps Channel to Channel Skew (Typical)3.3V Power Supply DesignGlitch-free Power on at CLKI/O PinsLow Power Design (20 mA @ 3.3V Static)Accepts Small Swing (300 mV Typical) Differential Signal LevelsIndustrial Temperature Operating Range (-40°C to +85°C)Available in 24-pin TSSOP PackagingAll trademarks are the property of their respective owners.Master/Slave Clock Selection in a Backplane Application125 MHz Operation (Typical)100 ps Duty Cycle Distortion (Typical)50 ps Channel to Channel Skew (Typical)3.3V Power Supply DesignGlitch-free Power on at CLKI/O PinsLow Power Design (20 mA @ 3.3V Static)Accepts Small Swing (300 mV Typical) Differential Signal LevelsIndustrial Temperature Operating Range (-40°C to +85°C)Available in 24-pin TSSOP PackagingAll trademarks are the property of their respective owners.

Description

The DS92CK16 1 to 6 Clock Buffer/Bus Transceiver is a one to six CMOS differential clock distribution device utilizing Bus Low Voltage Differential Signaling (BLVDS) technology. This clock distribution device is designed for applications requiring ultra low power dissipation, low noise, and high data rates. The BLVDS side is a transceiver with a separate channel acting as a return/source clock. The DS92CK16 accepts LVDS (300 mV typical) differential input levels, and translates them to 3V CMOS output levels. An output enable pinOE, when high, forces all CLKOUTpins high. The device can be used as a source synchronous driver. The selection of the source driving is controlled by the CrdCLKINandDEpins. This device can be the master clock, driving the inputs of other clock I/O pins in a multipoint environment. Easy master/slave clock selection is achieved along a backplane. The DS92CK16 1 to 6 Clock Buffer/Bus Transceiver is a one to six CMOS differential clock distribution device utilizing Bus Low Voltage Differential Signaling (BLVDS) technology. This clock distribution device is designed for applications requiring ultra low power dissipation, low noise, and high data rates. The BLVDS side is a transceiver with a separate channel acting as a return/source clock. The DS92CK16 accepts LVDS (300 mV typical) differential input levels, and translates them to 3V CMOS output levels. An output enable pinOE, when high, forces all CLKOUTpins high. The device can be used as a source synchronous driver. The selection of the source driving is controlled by the CrdCLKINandDEpins. This device can be the master clock, driving the inputs of other clock I/O pins in a multipoint environment. Easy master/slave clock selection is achieved along a backplane.