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16 SOIC
Integrated Circuits (ICs)

CDCVF25081D

Active
Texas Instruments

1:8 3.3-V PHASE LOCK LOOP CLOCK DRIVER

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16 SOIC
Integrated Circuits (ICs)

CDCVF25081D

Active
Texas Instruments

1:8 3.3-V PHASE LOCK LOOP CLOCK DRIVER

Technical Specifications

Parameters and characteristics for this part

SpecificationCDCVF25081D
Differential - Input:OutputFalse
Divider/MultiplierFalse
Frequency - Max [Max]200 MHz
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputLVTTL
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
PLLYes with Bypass
Ratio - Input:Output [custom]8
Ratio - Input:Output [custom]2
Supplier Device Package16-SOIC
TypePLL Clock Driver
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 4.30
10$ 3.86
40$ 3.65
120$ 3.16
280$ 3.00
520$ 2.69
1000$ 2.27
2520$ 2.16
Texas InstrumentsTUBE 1$ 3.24
100$ 2.84
250$ 1.99
1000$ 1.61

Description

General part information

CDCVF25081 Series

The CDCVF25081 is a high performance, low skew, low jitter, phased-locked loop clock driver. It uses a PLL to precisely align, in both frequency and phase, the output clocks to the input clock signal. The outputs are divided into 2 banks for a total of 8 buffered CLKIN outputs. The device automatically puts the outputs to a low state when no CLKIN signal is present (power down mode).

The S1 and S2 pins allow selection between PLL or bypassed PLL outputs. When left open, the outputs are disabled to a logic low state.

The part supports a fail-safe function. The device further incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.