
SN74ABTH18504APM
ActiveSCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS
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SN74ABTH18504APM
ActiveSCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ABTH18504APM |
|---|---|
| Current - Output High, Low [custom] | 64 mA |
| Current - Output High, Low [custom] | 32 mA |
| Logic Type | Scan Test Universal Bus Transceiver |
| Mounting Type | Surface Mount |
| Number of Circuits | 20-Bit |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 64-LQFP |
| Supplier Device Package | 64-LQFP (10x10) |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Arrow | N/A | 160 | $ 11.07 | |
| Digikey | Tray | 1 | $ 20.36 | |
| 10 | $ 16.26 | |||
| 25 | $ 15.24 | |||
| 160 | $ 15.85 | |||
| 320 | $ 13.45 | |||
| 640 | $ 13.15 | |||
| Texas Instruments | JEDEC TRAY (10+1) | 1 | $ 15.98 | |
| 100 | $ 13.96 | |||
| 250 | $ 10.76 | |||
| 1000 | $ 9.63 | |||
Description
General part information
SN74ABTH18504A Series
The 'ABTH18504A and 'ABTH182504A scan test devices with 20-bit universal bus transceivers are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.
In the normal mode, these devices are 20-bit universal bus transceivers that combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, or clocked modes. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPETMuniversal bus transceivers.
Data flow in each direction is controlled by output-enable (and), latch-enable (LEAB and LEBA), clock-enable (and), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A-bus data is latched whileis high and/or CLKAB is held at a static low or high logic level. Otherwise, if LEAB is low andis low, A-bus data is stored on a low-to-high transition of CLKAB. Whenis low, the B outputs are active. Whenis high, the B outputs are in the high-impedance state. B-to-A data flow is similar to A-to-B data flow, but uses the, LEBA,, and CLKBA inputs.
Documents
Technical documentation and resources