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PQFP / 44
Integrated Circuits (ICs)

HV5522PG-G

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Microchip Technology

32-CHANNEL SERIAL TO PARALLEL CONVERTER WITH OPEN DRAIN OUTPUTS ,COUNTER SHIFT REGISTER

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PQFP / 44
Integrated Circuits (ICs)

HV5522PG-G

Active
Microchip Technology

32-CHANNEL SERIAL TO PARALLEL CONVERTER WITH OPEN DRAIN OUTPUTS ,COUNTER SHIFT REGISTER

Technical Specifications

Parameters and characteristics for this part

SpecificationHV5522PG-G
FunctionSerial to Parallel
Logic TypeShift Register
Mounting TypeSurface Mount
Number of Bits per Element32
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeOpen Drain
Package / Case44-QFP
Supplier Device Package44-PQFP (10x10)
Voltage - Supply [Max]13.2 V
Voltage - Supply [Min]10.8 VDC

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 1$ 8.26
25$ 6.89
100$ 6.25
Microchip DirectTRAY 1$ 8.26
25$ 6.89
100$ 6.25
1000$ 6.04
5000$ 5.98
NewarkEach 25$ 7.07
100$ 6.44

Description

General part information

HV5522 Series

The HV5522 is a low-voltage serial to high-voltage parallel converter with open drain outputs. This device has been designed for use as a driver for AC-electroluminescent displays. It can also be used in any application requiring multiple output high voltage current sinking capabilities such as driving inkjet and electrostatic print heads, plasma panels, vacuum fluorescent, or large matrix LCD displays.

This device consists of a 32-bit shift register, 32 latches, and control logic to perform the polarity select and blanking of the outputs. Data is shifted through the shift register on the high to low transition of the clock. The HV5522 shifts in the counter clockwise direction when viewed from the top of the package. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. Operation of the shift register is not affected by the LE (latch enable), BL (blanking), or the POL (polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE (latch enable) input is high. The data in the latch is stored when LE is low.