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20-SOIC Pkg
Integrated Circuits (ICs)

SN74LVC374ADWR

Active
Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 3-ST 1-ELEMENT 20-PIN SOIC T/R

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20-SOIC Pkg
Integrated Circuits (ICs)

SN74LVC374ADWR

Active
Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 3-ST 1-ELEMENT 20-PIN SOIC T/R

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC374ADWR
Clock Frequency100 MHz
Current - Output High, Low24 mA
Current - Quiescent (Iq)10 µA
FunctionStandard
Input Capacitance4 pF
Max Propagation Delay @ V, Max CL7 ns
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case20-SOIC
Package / Case [y]0.295 in
Package / Case [y]7.5 mm
Supplier Device Package20-SOIC
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.73
10$ 0.64
25$ 0.60
100$ 0.49
250$ 0.46
500$ 0.39
1000$ 0.31
Digi-Reel® 1$ 0.73
10$ 0.64
25$ 0.60
100$ 0.49
250$ 0.46
500$ 0.39
1000$ 0.31
Tape & Reel (TR) 2000$ 0.25
6000$ 0.23
10000$ 0.23
Texas InstrumentsLARGE T&R 1$ 0.42
100$ 0.33
250$ 0.24
1000$ 0.17

Description

General part information

SN74LVC374A-EP Series

The SN74LVC374A-EP octal edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCCoperation.

This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

Documents

Technical documentation and resources

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Live Insertion

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Logic Guide (Rev. AB)

Selection guide

TI IBIS File Creation, Validation, and Distribution Processes

Application note

SNx4LVC374A Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet (Rev. O)

Data sheet

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Input and Output Characteristics of Digital Integrated Circuits

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Texas Instruments Little Logic Application Report

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

LVC Characterization Information

Application note

Signal Switch Data Book (Rev. A)

User guide

Low-Voltage Logic (LVC) Designer's Guide

Design guide

How to Select Little Logic (Rev. A)

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Power-Up Behavior of Clocked Devices (Rev. B)

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide