
DS320PR1601ZDGR
ActivePCIE® 5.0, 32-GBPS, 16-LANE LINEAR REDRIVER
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DS320PR1601ZDGR
ActivePCIE® 5.0, 32-GBPS, 16-LANE LINEAR REDRIVER
Technical Specifications
Parameters and characteristics for this part
| Specification | DS320PR1601ZDGR |
|---|---|
| Applications | PCI Express® |
| Capacitance - Input | 1.2 pF |
| Data Rate (Max) | 32 Gbps |
| Delay Time | 130 ps |
| Input | Differential |
| Mounting Type | Surface Mount |
| Number of Channels [custom] | 32 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | Differential |
| Package / Case | WLBGA, 354-LFBGA |
| Signal Conditioning | Input Equalization, Output De-Emphasis |
| Supplier Device Package | 354-NFBGA (22.8x8.9) |
| Type | ReDriver, Buffer |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 1000 | $ 37.88 | |
| Texas Instruments | LARGE T&R | 1 | $ 45.90 | |
| 100 | $ 40.80 | |||
| 250 | $ 33.54 | |||
| 1000 | $ 30.00 | |||
Description
General part information
DS320PR1601 Series
The DS320PR1601 is a 32-channel (16-channel in each direction) or x16 (16-lane) low-power high-performance linear repeater or redriver designed to support PCIe 5.0, CXL 2.0, UPI 2.0 and other interfaces up to 32 Gbps.
The DS320PR1601 receivers deploy continuous time linear equalizers (CTLE) to provide a programmable high-frequency boost. The equalizer can open an input eye that is completely closed due to inter-symbol interference (ISI) induced by an interconnect medium, such as PCB traces. The CTLE receiver is followed by a linear output driver. The linear datapaths of DS320PR1601 preserves transmit preset signal characteristics. The linear redriver becomes part of the passive channel that as a whole get link trained for best transmit and receive equalization settings. This transparency in the link training protocol results in best electrical link and lowest possible latency. Low channel-channel cross-talk, low additive jitter and excellent return loss makes the device almost a passive element in the link, but with its equalization.
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Documents
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