Specification	SN74LVTH373DWR

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Delay Time - Propagation	2.7 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	20-SOIC
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	20-SOIC
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2.7 V

SN74LVTH373-EP Series

Enhanced Product 3.3-V Abt Octal Transparent D-Type Latches With 3-State Outputs

Part	Logic Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Circuit [custom]	Circuit [custom]	Package / Case [y]	Package / Case	Package / Case [x]	Supplier Device Package	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Output Type	Independent Circuits	Mounting Type	Delay Time - Propagation	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [y]
Texas Instruments SN74LVTH373PWR	D-Type Transparent Latch	2.7 V	3.6 V	8	8	4.4 mm	20-TSSOP	0.173 in	20-TSSOP	64 mA	32 mA	Tri-State	1	Surface Mount	2.7 ns	85 °C	-40 °C
Texas Instruments SN74LVTH373DBR	D-Type Transparent Latch	2.7 V	3.6 V	8	8		20-SSOP		20-SSOP	64 mA	32 mA	Tri-State	1	Surface Mount	2.7 ns	85 °C	-40 °C
Texas Instruments SN74LVTH373IPWREP	D-Type Transparent Latch	2.7 V	3.6 V	8	8	4.4 mm	20-TSSOP	0.173 in	20-TSSOP	64 mA	32 mA	Tri-State	1	Surface Mount	2.7 ns	85 °C	-40 °C
Texas Instruments SN74LVTH373DWR	D-Type Transparent Latch	2.7 V	3.6 V	8	8	0.295 in	20-SOIC		20-SOIC	64 mA	32 mA	Tri-State	1	Surface Mount	2.7 ns	85 °C	-40 °C	7.5 mm
Texas Instruments SN74LVTH373PWRE4	D-Type Transparent Latch	2.7 V	3.6 V	8	8	4.4 mm	20-TSSOP	0.173 in	20-TSSOP	64 mA	32 mA	Tri-State	1	Surface Mount	2.7 ns	85 °C	-40 °C
Texas Instruments SN74LVTH373PW	D-Type Transparent Latch	2.7 V	3.6 V	8	8	4.4 mm	20-TSSOP	0.173 in	20-TSSOP	64 mA	32 mA	Tri-State	1	Surface Mount	2.7 ns	85 °C	-40 °C
Texas Instruments SN74LVTH373DWRG4	D-Type Transparent Latch	2.7 V	3.6 V	8	8	0.295 in	20-SOIC		20-SOIC	64 mA	32 mA	Tri-State	1	Surface Mount	2.7 ns	85 °C	-40 °C	7.5 mm
Texas Instruments SN74LVTH373DW	D-Type Transparent Latch	2.7 V	3.6 V	8	8	0.295 in	20-SOIC		20-SOIC	64 mA	32 mA	Tri-State	1	Surface Mount	2.7 ns	85 °C	-40 °C	7.5 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.91
		10	$ 0.80
		25	$ 0.75
		100	$ 0.61
		250	$ 0.57
		500	$ 0.48
		1000	$ 0.39
	Digi-Reel®	1	$ 0.91
		10	$ 0.80
		25	$ 0.75
		100	$ 0.61
		250	$ 0.57
		500	$ 0.48
		1000	$ 0.39
	Tape & Reel (TR)	2000	$ 0.35
		6000	$ 0.33
		10000	$ 0.31
Texas Instruments	LARGE T&R	1	$ 0.59
		100	$ 0.45
		250	$ 0.33
		1000	$ 0.24

Description

General part information

SN74LVTH373-EP Series

These octal latches are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.