Integrated Circuits (ICs)

PL102-10TC-R

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Microchip Technology

IC CLK BUFFER 1:3 170MHZ 6SOT23

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Integrated Circuits (ICs)

PL102-10TC-R

Active

Microchip Technology

IC CLK BUFFER 1:3 170MHZ 6SOT23

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DocumentsDatasheet

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	PL102-10TC-R

Differential - Input:Output	False
Divider/Multiplier	False
Frequency - Max [Max]	170 MHz
Input	Clock
Mounting Type	Surface Mount
Number of Circuits	1
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Output	Clock
Package / Case	SOT-23-6
PLL	Yes with Bypass
Ratio - Input:Output [custom]	1:3
Supplier Device Package	SOT-23-6
Voltage - Supply [Max]	3.63 V
Voltage - Supply [Min]	2.25 V

PL102-10 Series

Part	Supplier Device Package	Frequency - Max [Max]	Ratio - Input:Output [custom]	Package / Case	Number of Circuits	Operating Temperature [Max]	Operating Temperature [Min]	PLL	Output	Input	Voltage - Supply [Max]	Voltage - Supply [Min]	Mounting Type
Microchip Technology PL102-10TC	SOT-23-6	170 MHz	1:3	SOT-23-6	1	70 °C	0 °C	Yes with Bypass	Clock	Clock	3.63 V	2.25 V	Surface Mount
Microchip Technology PL102-10TC-R	SOT-23-6	170 MHz	1:3	SOT-23-6	1	70 °C	0 °C	Yes with Bypass	Clock	Clock	3.63 V	2.25 V	Surface Mount
Microchip Technology PL102-10TI	SOT-23-6	170 MHz	1:3	SOT-23-6	1	85 °C	-40 °C	Yes with Bypass	Clock	Clock	3.63 V	2.25 V	Surface Mount
Microchip Technology PL102-10TI-R	SOT-23-6	170 MHz	1:3	SOT-23-6	1	85 °C	-40 °C	Yes with Bypass	Clock	Clock	3.63 V	2.25 V	Surface Mount

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Microchip Direct	T/R	1	$ 2.02
		25	$ 1.69
		100	$ 1.54
		1000	$ 1.47
		5000	$ 1.46

Description

General part information

PL102-10 Series

The PL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOP or 6-pin SOT23 package. It has two outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than ±350ps, the device acts as a zero delay buffer.

Documents

Technical documentation and resources