
Deep-Dive with AI
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Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | AD7476ARTZ-REEL |
|---|---|
| Architecture | SAR |
| Configuration | S/H-ADC |
| Data Interface | DSP, SPI |
| Input Type | Single Ended |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Bits | 12 bits |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | SOT-23-6 |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | Supply |
| Sampling Rate (Per Second) | 1 M |
| Supplier Device Package | SOT-23-6 |
| Voltage - Supply, Analog [Max] | 5.25 V |
| Voltage - Supply, Analog [Min] | 2.35 V |
| Voltage - Supply, Digital [Max] | 5.25 V |
| Voltage - Supply, Digital [Min] | 2.35 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
AD7476A Series
The AD7476A /AD7477A/AD7478Aare 12-bit, 10-bit, and 8-bit high speed, low power, successive-approximation analog-to-digital converters (ADCs), respectively. The parts operate from a single 2.35 V to 5.25 V power supply and feature throughput rates up to 1 MSPS. The parts contain a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 13 MHz. The conversion process and data acquisition are controlled usingCSand the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on the falling edge ofCS, and the conversion is also initiated at this point. There are no pipeline delays associated with the parts. The AD7476A / AD7477A / AD7478A use advanced design techniques to achieve low power dissipation at high throughput rates. The reference for the part is taken internally from VDDto allow the widest dynamic input range to the ADC. Thus, the analog input range for the part is 0 V to VDD. The conversion rate is determined by the SCLK.PRODUCT HIGHLIGHTSFirst 12-/10-/8-bit ADCs in a SC70 package.High throughput with low power consumption.Flexible power/serial clock speed management. The conversion rate is determined by the serial clock, allowing the conversion time to be reduced through the serial clock speed increase. This allows the average power consumption to be reduced when a power-down mode is used while not converting. The parts also feature a power-down mode to maximize power efficiency at lower throughput rates. Current consumption is 1 µA maximum and 50 nA typically when in power-down mode.Reference derived from the power supply.No pipeline delay. The parts feature a standard successive approximation ADC with accurate control of the sampling instant via aCSinput and once-off conversion control.APPLICATIONSBattery-powered systemsPersonal digital assistantsMedical instrumentsMobile communicationsInstrumentation and control systemsData acquisition systemsHigh speed modemsOptical sensors
Documents
Technical documentation and resources