SN65LVCP1414RLJT
Active14.2-GBPS QUAD CHANNEL, DUAL MODE LINEAR EQUALIZER
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SN65LVCP1414RLJT
Active14.2-GBPS QUAD CHANNEL, DUAL MODE LINEAR EQUALIZER
Technical Specifications
Parameters and characteristics for this part
| Specification | SN65LVCP1414RLJT |
|---|---|
| Data Rate (Max) | 14.2 Gbps |
| Delay Time | 65 ps |
| Input | CML |
| Mounting Type | Surface Mount |
| Number of Channels | 4 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | CML |
| Package / Case | 38-WFQFN Exposed Pad |
| Signal Conditioning | Output Pre-Emphasis, Input Equalization |
| Type | ReDriver, Buffer |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 2.375 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 14.47 | |
| 10 | $ 13.35 | |||
| 25 | $ 13.20 | |||
| Digi-Reel® | 1 | $ 14.47 | ||
| 10 | $ 13.35 | |||
| 25 | $ 13.20 | |||
| Tape & Reel (TR) | 250 | $ 13.20 | ||
| Texas Instruments | SMALL T&R | 1 | $ 17.53 | |
| 100 | $ 15.31 | |||
| 250 | $ 11.81 | |||
| 1000 | $ 10.56 | |||
Description
General part information
SN65LVCP1414 Series
The SN65LVCP1414 is an asynchronous, protocol-agnostic, low latency, four-channel linear equalizer optimized for use up to 14.2Gbps and compensates for losses in backplane or active cable applications. The architecture of the SN65LVCP1414 is designed to work with an ASIC or FPGA with digital equalization employing Decision Feedback Equalizers (DFE). The SN65LVCP1414 linear equalizer preserves the shape of the transmitted signal ensuring optimum DFE performance. The SN65LVCP1414 provides a low power solution while at the same time extending the effectiveness of DFE.
The SN65LVCP1414 is configurable via I2C or GPIO interface. Using the I2C interface of the SN65LVCP1414 enables the user to control independently the Equalization, Path Gain, and Output Dynamic Range for each individual channel. In GPIO mode, Equalization, Path Gain, and Output Dynamic Range can be set for all channels using the GPIO Input pins.
The SN65LVCP1414 outputs can be disabled independently via I2C.
Documents
Technical documentation and resources
