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Technical Specifications

Parameters and characteristics for this part

SpecificationADCLK907BCPZ-R2
Differential - Input:Output [custom]True
Differential - Input:Output [custom]True
Frequency - Max [Max]7.5 GHz
InputClock
Mounting TypeSurface Mount
Number of Circuits2
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
OutputPECL, ECL, NECL
Ratio - Input:Output [custom]1:1
Supplier Device Package16-LFCSP-VQ (3x3)
TypeBuffer/Driver, Data
Voltage - Supply [Max]3.63 V
Voltage - Supply [Min]2.375 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 23.80
10$ 17.49
25$ 15.88
100$ 14.07
Digi-Reel® 1$ 23.80
10$ 17.49
25$ 15.88
100$ 14.07
Tape & Reel (TR) 250$ 13.03

Description

General part information

ADCLK907 Series

TheADCLK905(one input, one output), ADCLK907 (dual one input, one output), andADCLK925(one input, two outputs) are ultrafast clock/data buffers fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process.The ADCLK905/ADCLK907/ADCLK925 feature full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias VCCto the positive supply and VEEto ground. For NECL (negative ECL) operation, bias VCCto ground and VEEto the negative supply.The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate, 10 Gbps data rate, and 60 fs random jitter (RJ).The inputs have center tapped, 100 Ω, on-chip termination resistors. A VREFpin is available for biasing ac-coupled inputs.The ECL output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC− 2 V for a total differential output swing of 1.6 V.The ADCLK905/ADCLK907/ADCLK925 are available in 16-lead LFCSP packages.ApplicationsClock and data signal restoration and level shiftingAutomated test equipment (ATE)High speed instrumentationHigh speed line receiversThreshold detectionConverter clocking