Integrated Circuits (ICs)

CD74HC4075PWT

Obsolete

3-CH, 3-INPUT, 2-V TO 6-V 5.2-MA DRIVE STRENGTH OR GATE

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Search across all available documentation for this part.

DocumentsUnderstanding and Interpreting Standard-Logic Data Sheets (Rev. C)Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc +12

Integrated Circuits (ICs)

CD74HC4075PWT

Obsolete

Texas Instruments

3-CH, 3-INPUT, 2-V TO 6-V 5.2-MA DRIVE STRENGTH OR GATE

Deep-Dive with AI

DocumentsUnderstanding and Interpreting Standard-Logic Data Sheets (Rev. C)Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc +12

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	CD74HC4075PWT

Current - Output High, Low [custom]	5.2 mA
Current - Output High, Low [custom]	5.2 mA
Input Logic Level - High [Max]	4.2 V
Input Logic Level - High [Min]	1.5 V
Input Logic Level - Low [Max]	1.8 V
Input Logic Level - Low [Min]	0.5 V
Logic Type	OR Gate
Max Propagation Delay @ V, Max CL	17 ns
Mounting Type	Surface Mount
Number of Circuits	3
Number of Inputs	3
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Package / Case	14-TSSOP
Package / Case [custom]	0.173 "
Package / Case [custom]	4.4 mm
Supplier Device Package	14-TSSOP
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

CD74HC4075 Series

3-ch, 3-input, 2-V to 6-V 5.2-mA drive strength OR gate

Part	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Number of Inputs	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Package / Case [y]	Package / Case [x]	Number of Circuits	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Max Propagation Delay @ V, Max CL	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Logic Type	Operating Temperature [Min]	Operating Temperature [Max]	Package / Case [custom]	Package / Case [custom]	Supplier Device Package
Texas Instruments CD74HC4075E	1.5 V	4.2 V	3	2 V	6 V	14-DIP	7.62 mm	0.3 "	3	1.8 V	0.5 V	17 ns	5.2 mA	5.2 mA	Through Hole	OR Gate	-55 °C	125 °C
Texas Instruments CD74HC4075EG4	1.5 V	4.2 V	3	2 V	6 V	14-DIP	7.62 mm	0.3 "	3	1.8 V	0.5 V	17 ns	5.2 mA	5.2 mA	Through Hole	OR Gate	-55 °C	125 °C
Texas Instruments CD74HC4075PWT	1.5 V	4.2 V	3	2 V	6 V	14-TSSOP			3	1.8 V	0.5 V	17 ns	5.2 mA	5.2 mA	Surface Mount	OR Gate	-55 °C	125 °C	0.173 "	4.4 mm	14-TSSOP
Texas Instruments CD74HC4075PW	1.5 V	4.2 V	3	2 V	6 V	14-TSSOP			3	1.8 V	0.5 V	17 ns	5.2 mA	5.2 mA	Surface Mount	OR Gate	-55 °C	125 °C	0.173 "	4.4 mm	14-TSSOP
Texas Instruments CD74HC4075M	1.5 V	4.2 V	3	2 V	6 V	14-SOIC	3.9 mm	0.154 in	3	1.8 V	0.5 V	17 ns	5.2 mA	5.2 mA	Surface Mount	OR Gate	-55 °C	125 °C
Texas Instruments CD74HC4075MT	1.5 V	4.2 V	3	2 V	6 V	14-SOIC	3.9 mm	0.154 in	3	1.8 V	0.5 V	17 ns	5.2 mA	5.2 mA	Surface Mount	OR Gate	-55 °C	125 °C
Texas Instruments CD74HC4075E-NG	1.5 V	4.2 V	3	2 V	6 V	14-DIP	7.62 mm	0.3 "	3	1.8 V	0.5 V	17 ns	5.2 mA	5.2 mA	Through Hole	OR Gate	-55 °C	125 °C

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.16
		10	$ 1.04
		25	$ 0.99
		100	$ 0.81
	Digi-Reel®	1	$ 1.16
		10	$ 1.04
		25	$ 0.99
		100	$ 0.81
	Tape & Reel (TR)	250	$ 0.76
		500	$ 0.67
		1250	$ 0.53
		2500	$ 0.49
		6250	$ 0.47
		12500	$ 0.45
Texas Instruments	SMALL T&R	1	$ 0.86
		100	$ 0.66
		250	$ 0.49
		1000	$ 0.35

Description

General part information

CD74HC4075 Series

This device contains three independent 3-input OR gates. Each gate performs the Boolean function Y = A + B + C in positive logic.

Documents

Technical documentation and resources

CD74HC4075PWT

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CD74HC4075PWT

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Technical Specifications

CD74HC4075 Series

Pricing

Description

CD74HC4075 Series

Documents

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

SN54/74HCT CMOS Logic Family Applications and Restrictions

CDx4HC4075 Triple 3-Input OR Gates datasheet (Rev. H)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Live Insertion

Implications of Slow or Floating CMOS Inputs (Rev. E)

CMOS Power Consumption and CPD Calculation (Rev. B)

Logic Guide (Rev. AB)

Input and Output Characteristics of Digital Integrated Circuits

LOGIC Pocket Data Book (Rev. B)

Designing With Logic (Rev. C)

TI IBIS File Creation, Validation, and Distribution Processes

Signal Switch Data Book (Rev. A)

CD74HC4075 Series