Specification	NC7SV74L8X

Clock Frequency	200 MHz
Current - Output High, Low	24 mA
Current - Quiescent (Iq)	900 µA
Function	Reset, Set(Preset)
Input Capacitance	2 pF
Max Propagation Delay @ V, Max CL	2.8 ns
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Complementary
Package / Case	8-UFQFN
Supplier Device Package	8-MicroPak™
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	0.9 V

NC7SV74 Series

TinyLogic ULP-A D-Type Flip-Flop with Preset and Clear

Part	Type	Number of Bits per Element	Input Capacitance	Function	Operating Temperature [Max]	Operating Temperature [Min]	Trigger Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Clock Frequency	Package / Case	Current - Quiescent (Iq)	Current - Output High, Low	Mounting Type	Supplier Device Package	Output Type	Max Propagation Delay @ V, Max CL	Number of Elements
ON Semiconductor NC7SV74L8X	D-Type	1	2 pF	Reset Set(Preset)	85 °C	-40 °C	Positive Edge	3.6 V	0.9 V	200 MHz	8-UFQFN	900 µA	24 mA	Surface Mount	8-MicroPak™	Complementary	2.8 ns	1

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

NC7SV74 Series

The NC7SV74 is a single D-type CMOS Flip-Flop with preset and clear from ON Semiconductor's Ultra Low Power-A (ULP-A) Series of TinyLogic® in both the space saving US8 and MicroPak™ packages. ULP-A is ideal for applications that require extreme high speed, high drive and low power. This product is designed for a wide low voltage operating range (0.9V to 3.6V VCC) and applications that require more drive and speed than the TinyLogic ULP series, but still require low power consumption.The NC7SV74 is uniquely designed for optimized power and speed, and is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation.The signal level applied to the D input is transferred to the Q output during the positive going transition of the CLK pulse.