NC7SV74 Series

TinyLogic ULP-A D-Type Flip-Flop with Preset and Clear

Catalog

TinyLogic ULP-A D-Type Flip-Flop with Preset and Clear

Part	Type	Number of Bits per Element	Input Capacitance	Function	Operating Temperature [Max]	Operating Temperature [Min]	Trigger Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Clock Frequency	Package / Case	Current - Quiescent (Iq)	Current - Output High, Low	Mounting Type	Supplier Device Package	Output Type	Max Propagation Delay @ V, Max CL	Number of Elements
ON Semiconductor NC7SV74L8X	D-Type	1	2 pF	Reset Set(Preset)	85 °C	-40 °C	Positive Edge	3.6 V	0.9 V	200 MHz	8-UFQFN	900 µA	24 mA	Surface Mount	8-MicroPak™	Complementary	2.8 ns	1

Catalog

TinyLogic ULP-A D-Type Flip-Flop with Preset and Clear

Key Features

• Space saving US8 surface mount package

• MicroPak Pb-Free leadless package

• 0.9V to 3.6V VCCsupply operation

• 3.6V overvoltage tolerant I/Os at VCCfrom 0.9V to 3.6V

• Extremely High Speed tPD1.0 ns typ for 2.7V to 3.6V VCC1.2 ns typ for 2.3V to 2.7V VCC1.9 ns typ for 1.65V to 1.95V VCC3.2 ns typ for 1.4V to 1.6V VCC6.0 ns typ for 1.1V to 1.3V VCC13.0 ns typ for 0.9V VCC

• Power-Off high impedance inputs and outputs

• High Static Drive (IOH/IOL)±24.0 mA @ 3.00V VCC±18.0 mA @ 2.30V VCC±6.0 mA @ 1.65V VCC±4.0 mA @ 1.4V VCC±2.0 mA @ 1.1V VCC±0.1 mA @ 0.9V VCC

• Ultra low dynamic power

Description

The NC7SV74 is a single D-type CMOS Flip-Flop with preset and clear from ON Semiconductor's Ultra Low Power-A (ULP-A) Series of TinyLogic® in both the space saving US8 and MicroPak™ packages. ULP-A is ideal for applications that require extreme high speed, high drive and low power. This product is designed for a wide low voltage operating range (0.9V to 3.6V VCC) and applications that require more drive and speed than the TinyLogic ULP series, but still require low power consumption.The NC7SV74 is uniquely designed for optimized power and speed, and is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation.The signal level applied to the D input is transferred to the Q output during the positive going transition of the CLK pulse.