
AD9213BBPZ-6G
Active12-BIT, 10.25 GSPS, JESD204B, RF ANALOG-TO-DIGITAL CONVERTER
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AD9213BBPZ-6G
Active12-BIT, 10.25 GSPS, JESD204B, RF ANALOG-TO-DIGITAL CONVERTER
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Technical Specifications
Parameters and characteristics for this part
| Specification | AD9213BBPZ-6G |
|---|---|
| Architecture | Pipelined |
| Configuration | ADC |
| Data Interface | JESD204B |
| Features | Simultaneous Sampling |
| Input Type | Single Ended |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Bits | 12 bits |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 115 °C |
| Operating Temperature [Min] | -20 C |
| Package / Case | 192-LFBGA Exposed Pad |
| Reference Type | Internal |
| Sampling Rate (Per Second) | 6 G |
| Supplier Device Package | 192-BGA-ED (12x12) |
| Voltage - Supply, Analog [Max] | 1.025 V |
| Voltage - Supply, Analog [Min] | 0.975 V |
| Voltage - Supply, Digital [Max] | 1.025 V |
| Voltage - Supply, Digital [Min] | 0.975 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 1 | $ 1577.19 | |
Description
General part information
AD9213 Series
The AD9213 is a single, 12-bit, 6 GSPS/10.25 GSPS, radio frequency (RF) analog-to-digital converter (ADC) with a 6.5 GHz input bandwidth. The AD9213 supports high dynamic range frequency and time domain applications requiring wide instantaneous bandwidth and low conversion error rates (CER). The AD9213 features a 16-lane JESD204B interface to support maximum bandwidth capability.The AD9213 achieves dynamic range and linearity performance while consuming <4.6 W typical. The device is based on an interleaved pipeline architecture and features a proprietary calibration and randomization technique that suppresses interleaving spurious artifacts into its noise floor. The linearity performance of the AD9213 is preserved by a combination of on-chip dithering and calibration, which results in excellent spurious-free performance over a wide range of input signal conditions.Applications that require less instantaneous bandwidth can benefit from the on-chip, digital signal processing (DSP) capability of the AD9213 that reduces the output data rate along with the number of JESD204B lanes required to support the device. The DSP path includes a digital downconverter (DDC) with a 48-bit, numerically controlled oscillator (NCO), followed by an I/Q digital decimator stage that allows selectable decimation rates that are factors of two or three. For fast frequency hopping applications, the AD9213 NCO supports up to 16 profile settings with a separate trigger input, allowing wide surveillance frequency coverage at a reduced JESD204B lane count.The AD9213 supports sample accurate multichip synchronization that includes synchronization of the NCOs. The AD9213 is offered in a 192-ball ball grid array (BGA) package and is specified over a junction temperature range of −20°C to +115°C.
Documents
Technical documentation and resources