
TPS3840DL45DBVR
ActiveNANOPOWER HIGH-INPUT VOLTAGE SUPERVISOR WITH MANUAL RESET AND PROGRAMMABLE-RESET TIME DELAY
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TPS3840DL45DBVR
ActiveNANOPOWER HIGH-INPUT VOLTAGE SUPERVISOR WITH MANUAL RESET AND PROGRAMMABLE-RESET TIME DELAY
Technical Specifications
Parameters and characteristics for this part
| Specification | TPS3840DL45DBVR |
|---|---|
| Mounting Type | Surface Mount |
| Number of Voltages Monitored | 1 |
| Operating Temperature [Max] | 125 ¯C |
| Operating Temperature [Min] | -40 °C |
| Output | Open Drain or Open Collector |
| Package / Case | SC-74A, SOT-753 |
| Reset | Active Low |
| Reset Timeout | 619 ms |
| Supplier Device Package | SOT-23-5 |
| Type | Power Supply Monitor |
| Voltage - Threshold | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.87 | |
| 10 | $ 0.78 | |||
| 25 | $ 0.74 | |||
| 100 | $ 0.60 | |||
| 250 | $ 0.56 | |||
| 500 | $ 0.50 | |||
| 1000 | $ 0.39 | |||
| Digi-Reel® | 1 | $ 0.87 | ||
| 10 | $ 0.78 | |||
| 25 | $ 0.74 | |||
| 100 | $ 0.60 | |||
| 250 | $ 0.56 | |||
| 500 | $ 0.50 | |||
| 1000 | $ 0.39 | |||
| Tape & Reel (TR) | 3000 | $ 0.28 | ||
| Texas Instruments | LARGE T&R | 1 | $ 0.56 | |
| 100 | $ 0.43 | |||
| 250 | $ 0.32 | |||
| 1000 | $ 0.23 | |||
Description
General part information
TPS3840-Q1 Series
Wide Vin allows monitoring 9V rails or batteries without external components and 24V rails with external resistors. Nano-Iq extends battery life for low power applications and minimizes current consumption when using external resistors. Fast start-up delay allows the detection of a voltage fault before the rest of the system powers up providing maximum safety in hazardous start-up fault conditions. Low Power-on-Reset (VPOR) prevents false resets, premature enable or turn-on of next device, and proper transistor control during power-up and power-down.
Reset output signal is asserted when the voltage at VDDdrops below the negative voltage threshold (VIT-) or when manual reset (MR) is pulled to a low logic (VMR_L). Reset signal is cleared when VDDrise above VIT-plus hysteresis (VIT+) and manual reset is floating or above VMR_Hand the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between CT pin and ground. For a fast reset CT pin can be left floating.
Additional features: Built-in glitch immunity protection forMRand VDD, built-in hysteresis, low open-drain output leakage current (ILKG(OD)).
Documents
Technical documentation and resources