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100-CBGA
Integrated Circuits (ICs)

ATXMEGA128A1U-CUR

Obsolete
Microchip Technology

IC MCU 8/16B 128KB FLASH 100CBGA

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100-CBGA
Integrated Circuits (ICs)

ATXMEGA128A1U-CUR

Obsolete
Microchip Technology

IC MCU 8/16B 128KB FLASH 100CBGA

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationATXMEGA128A1U-CUR
ConnectivitySPI, I2C, USB, IrDA, EBI/EMI, UART/USART
Core ProcessorAVR
Core Size8 Bit, 16 Bit
Data Converters4x12b, 16x12b
EEPROM Size2K x 8
Mounting TypeSurface Mount
Number of I/O78
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Oscillator TypeInternal
PeripheralsBrown-out Detect/Reset, DMA, POR, WDT, PWM
Program Memory TypeFLASH
RAM Size8 K
Speed32 MHz
Supplier Device Package100-CBGA (9x9)
Voltage - Supply (Vcc/Vdd) [Max]3.6 V
Voltage - Supply (Vcc/Vdd) [Min]1.6 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 10.64
25$ 9.76
100$ 8.83

Description

General part information

ATxmega128A1U Series

The high-performance, low-power 8-/16-bit AVR® XMEGA® microcontroller combines 128 KB ISP Flash memory (8 KB boot code section) with read-while-write capabilities, 2 KB EEPROM, 8 KB SRAM, four-channel event system, a programmable multi-level interrupt controller, 34 general purpose I/O lines, a 16-bit real-time counter, four flexible 16-bit timer/counters with compare modes and PWM, two USARTs, two Two-Wire Interfaces (TWIs), two Serial Peripheral Interfaces (SPIs), one 12-channel/12-bit A/D converter with optional differential input with programmable gain, two analog comparators with window mode, a programmable watchdog timer with separate internal oscillator, accurate internal oscillators with PLL and prescaler, and programmable brown-out detection. The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging, is available. By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching one MIPS per MHz, balancing power consumption and processing speed.

Documents

Technical documentation and resources