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32-VQFN
Integrated Circuits (ICs)

ATMEGA64M1-MU

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Microchip Technology

8 BIT MCU, AVR ATMEGA FAMILY ATMEGA64 SERIES MICROCONTROLLERS, AVR, 16 MHZ, 64 KB, 32 PINS, QFN

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32-VQFN
Integrated Circuits (ICs)

ATMEGA64M1-MU

Active
Microchip Technology

8 BIT MCU, AVR ATMEGA FAMILY ATMEGA64 SERIES MICROCONTROLLERS, AVR, 16 MHZ, 64 KB, 32 PINS, QFN

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Technical Specifications

Parameters and characteristics for this part

SpecificationATMEGA64M1-MU
ConnectivitySPI, CANbus, LINbus, UART/USART
Core ProcessorAVR
Core Size8-Bit
Data Converters [custom]10 b, 10 b
Data Converters [custom]11, 1
EEPROM Size2K x 8
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Oscillator TypeInternal
Package / Case32-VFQFN Exposed Pad
PeripheralsPWM, WDT, Brown-out Detect/Reset, POR, Temp Sensor
Program Memory Size64 KB
Program Memory TypeFLASH
RAM Size4K x 8
Speed16 MHz
Supplier Device Package32-VQFN (5x5)
Voltage - Supply (Vcc/Vdd) [Max]5.5 V
Voltage - Supply (Vcc/Vdd) [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 1$ 6.89
25$ 6.32
100$ 5.74
Microchip DirectTRAY 1$ 6.89
25$ 6.32
100$ 5.74
1000$ 5.26
5000$ 5.02

Description

General part information

ATmega64RFR2 Series

The high-performance, low-power Microchip 8-bit AVR® RISC-based microcontroller combines 64 KB ISP Flash memory with read-while-write capabilities, 2 KB EEPROM, 4 KB SRAM, 27 general purpose I/O lines, 32 general purpose working registers, one motor power stage controller, two flexible timer/counters with compare modes and PWM, one UART with HW LIN, an 11-channel 10-bit A/D converter with two differential programmable gain input stages, a 10-bit D/A converter, a programmable watchdog timer with an internal individual oscillator, SPI serial port, an on-chip debug system, and four software selectable power saving modes. The device operates between 2.7-5.5 volts.

By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching one MIPS per MHz, balancing power consumption and processing speed.