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Technical Specifications
Parameters and characteristics for this part
| Specification | ZL30260LDF1 |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Divider/Multiplier | Yes/No |
| Frequency - Max [Max] | 1.045 GHz |
| Input | CMOS, Crystal |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 56-VFQFN Exposed Pad |
| PLL | Yes with Bypass |
| Ratio - Input:Output | 4:6 |
| Supplier Device Package | 56-QFN (8x8) |
| Type | Clock Multiplier, Frequency Synthesizer |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 1.71 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 2700 | $ 10.19 | |
| Microchip Direct | T/R | 1 | $ 12.66 | |
| 25 | $ 10.55 | |||
| 100 | $ 9.59 | |||
| 1000 | $ 8.87 | |||
| 5000 | $ 8.42 | |||
Description
General part information
ZL30260 Series
[CREATE AND SAMPLE YOUR CUSTOM ZL30260 HERE](https://clockworks.microchip.com/microchip/design/inputZL)
The miClockSynth ZL30260 high-performance, any-rate multiplier and clock generator device simplifies board design by generating ultra-low-jitter clock signals from a single crystal or crystal oscillator while generating additional independent frequency families.
With two independent frequency families on one chip, best-in-class jitter performance, and fractional-N APLL with both a fractional and integer divider. The ZL30260 creates a complete clock-tree, improving design reliability, reducing bill of materials (BOM) cost, and simplifying design by replacing multiple crystals and peripheral timing components.
Documents
Technical documentation and resources