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Technical Specifications
Parameters and characteristics for this part
| Specification | ADS5421Y/R |
|---|---|
| Architecture | Pipelined |
| Configuration | S/H-ADC |
| Data Interface | Parallel |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Bits | 14 |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 64-LQFP |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | External, Internal |
| Sampling Rate (Per Second) | 40M |
| Supplier Device Package | 64-LQFP (10x10) |
| Voltage - Supply, Analog | 5 V |
| Voltage - Supply, Digital | 5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
ADS5421 Series
The ADS5421 is a high-dynamic range 14-bit, 40MHz, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.
The ADS5421 has a 4VPPdifferential input range (2VPP• 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.
The ADS5421 is available in a small LQFP-64 package.
Documents
Technical documentation and resources
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