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USON (DRY)
Integrated Circuits (ICs)

SN74LVC1G27DRYR

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Texas Instruments

NOR GATE 1-ELEMENT 3-IN CMOS 6-PIN USON T/R

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USON (DRY)
Integrated Circuits (ICs)

SN74LVC1G27DRYR

Active
Texas Instruments

NOR GATE 1-ELEMENT 3-IN CMOS 6-PIN USON T/R

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC1G27DRYR
Current - Output High, Low [x]32 mA
Current - Output High, Low [y]32 mA
Current - Quiescent (Max) [Max]10 µA
Input Logic Level - High [Max]2 V
Input Logic Level - High [Min]1.7 V
Input Logic Level - Low [Max]0.8 V
Input Logic Level - Low [Min]0.7 V
Logic TypeNOR Gate
Mounting TypeSurface Mount
Number of Circuits1
Number of Inputs3
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / Case6-UFDFN
Supplier Device Package6-SON (1.45x1)
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.47
10$ 0.35
25$ 0.32
100$ 0.22
250$ 0.19
500$ 0.15
1000$ 0.12
2500$ 0.10
Digi-Reel® 1$ 0.47
10$ 0.35
25$ 0.32
100$ 0.22
250$ 0.19
500$ 0.15
1000$ 0.12
2500$ 0.10
Tape & Reel (TR) 5000$ 0.10
10000$ 0.09
25000$ 0.08
50000$ 0.08
125000$ 0.07
Texas InstrumentsLARGE T&R 1$ 0.15
100$ 0.10
250$ 0.08
1000$ 0.05

Description

General part information

SN74LVC1G27 Series

The SN74LVC1G27 device performs the Boolean function Y =A + B + Cor Y =A•B•Cin positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Documents

Technical documentation and resources

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

LVC Characterization Information

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Signal Switch Data Book (Rev. A)

User guide

Understanding Advanced Bus-Interface Products Design Guide

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Texas Instruments Little Logic Application Report

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

How to Select Little Logic (Rev. A)

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Live Insertion

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Logic Guide (Rev. AB)

Selection guide

Single 3-Input Positive-NOR Gate datasheet (Rev. E)

Data sheet

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Selecting the Right Level Translation Solution (Rev. A)

Application note