Specification	SN74ALVCH16841DL

Circuit	10:10
Current - Output High, Low [custom]	24 mA
Current - Output High, Low [custom]	24 mA
Delay Time - Propagation	1 ns
Independent Circuits	2
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 C
Output Type	Tri-State
Package / Case	56-BSSOP
Package / Case [x]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	56-SSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

74ALVCH16841 Series

Part	Voltage - Supply [Min]	Voltage - Supply [Max]	Output Type	Circuit	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Package / Case [y]	Package / Case	Package / Case [x]	Logic Type	Delay Time - Propagation	Supplier Device Package	Independent Circuits
Texas Instruments SN74ALVCH16841DGGR	1.65 V	3.6 V	Tri-State	10:10	85 °C	-40 C	24 mA	24 mA	Surface Mount	6.1 mm	56-TFSOP	0.24 in	D-Type Transparent Latch	1 ns	56-TSSOP	2
Texas Instruments SN74ALVCH16841DL	1.65 V	3.6 V	Tri-State	10:10	85 °C	-40 C	24 mA	24 mA	Surface Mount	7.5 mm	56-BSSOP	0.295 in	D-Type Transparent Latch	1 ns	56-SSOP	2

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	0	$ 3.95
		14021	$ 3.95
	Tube	1	$ 6.24
		20	$ 5.60
		40	$ 5.30
		100	$ 4.59
		260	$ 4.36
		500	$ 3.91
		1000	$ 3.30
		2500	$ 3.13
Texas Instruments	TUBE	1	$ 4.71
		100	$ 4.13
		250	$ 2.89
		1000	$ 2.33

Description

General part information

74ALVCH16841 Series

This 20-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCCoperation.

The SN74ALVCH16841 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, unidirectional bus drivers, and working registers.

The SN74ALVCH16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

Documents

Technical documentation and resources

SN74ALVCH16841DL

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SN74ALVCH16841DL

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Technical Specifications

74ALVCH16841 Series

Pricing

Description

74ALVCH16841 Series

Documents

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

SN74ALVCH16841 datasheet (Rev. E)

Understanding Advanced Bus-Interface Products Design Guide

Live Insertion

TI IBIS File Creation, Validation, and Distribution Processes

CMOS Power Consumption and CPD Calculation (Rev. B)

Standard Linear & Logic for PCs, Servers & Motherboards

Input and Output Characteristics of Digital Integrated Circuits

Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)

ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B)

Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Power-Up Behavior of Clocked Devices (Rev. B)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Logic Guide (Rev. AB)

LOGIC Pocket Data Book (Rev. B)

TI SN74ALVC16835 Component Specification Analysis for PC100

74ALVCH16841 Series