Zenode.ai Logo
Beta
TSSOP (DGG)
Integrated Circuits (ICs)

SN74ALVCH16841DGGR

Active
Texas Instruments

20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

TSSOP (DGG)
Integrated Circuits (ICs)

SN74ALVCH16841DGGR

Active
Texas Instruments

20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74ALVCH16841DGGR
Circuit10:10
Current - Output High, Low [custom]24 mA
Current - Output High, Low [custom]24 mA
Delay Time - Propagation1 ns
Independent Circuits2
Logic TypeD-Type Transparent Latch
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 C
Output TypeTri-State
Package / Case56-TFSOP
Package / Case [x]0.24 in
Package / Case [y]6.1 mm
Supplier Device Package56-TSSOP
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 4.80
10$ 4.31
25$ 4.07
100$ 3.53
250$ 3.35
500$ 3.01
1000$ 2.54
Digi-Reel® 1$ 4.80
10$ 4.31
25$ 4.07
100$ 3.53
250$ 3.35
500$ 3.01
1000$ 2.54
N/A 105$ 5.03
3884$ 5.03
Tape & Reel (TR) 2000$ 2.24
Texas InstrumentsLARGE T&R 1$ 3.62
100$ 3.17
250$ 2.23
1000$ 1.79

Description

General part information

74ALVCH16841 Series

This 20-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCCoperation.

The SN74ALVCH16841 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, unidirectional bus drivers, and working registers.

The SN74ALVCH16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.