Specification	ADF4118BRUZ-RL7

Differential - Input:Output	Yes/No
Divider/Multiplier	Yes/No
Frequency - Max [Max]	3 GHz
Input	CMOS, TTL
Mounting Type	Surface Mount
Number of Circuits	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output	Clock
Package / Case	16-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
PLL	True
Ratio - Input:Output	2:1
Supplier Device Package	16-TSSOP
Type	Clock/Frequency Synthesizer (RF)
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	2.7 V

ADF4118 Series

Part	Supplier Device Package	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Ratio - Input:Output	Voltage - Supply [Min]	Voltage - Supply [Max]	Output	Divider/Multiplier	Number of Circuits	Type	Frequency - Max [Max]	Differential - Input:Output	Input	Package / Case [x]	Package / Case	Package / Case [y]
Analog Devices ADF4118BRU	16-TSSOP	Surface Mount	85 °C	-40 °C	2:1	2.7 V	5.5 V	Clock	Yes/No	1	Clock/Frequency Synthesizer (RF)	3 GHz	Yes/No	CMOS TTL	0.173 in	16-TSSOP	4.4 mm
Analog Devices ADF4118BRUZ-RL7	16-TSSOP	Surface Mount	85 °C	-40 °C	2:1	2.7 V	5.5 V	Clock	Yes/No	1	Clock/Frequency Synthesizer (RF)	3 GHz	Yes/No	CMOS TTL	0.173 in	16-TSSOP	4.4 mm
Analog Devices ADF4118BRUZ	16-TSSOP	Surface Mount	85 °C	-40 °C	2:1	2.7 V	5.5 V	Clock	Yes/No	1	Clock/Frequency Synthesizer (RF)	3 GHz	Yes/No	CMOS TTL	0.173 in	16-TSSOP	4.4 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 6.78
		10	$ 5.20
		25	$ 4.73
		100	$ 4.15
		250	$ 3.85
		500	$ 3.66
	Digi-Reel®	1	$ 6.78
		10	$ 5.20
		25	$ 4.73
		100	$ 4.15
		250	$ 3.85
		500	$ 3.66
	Tape & Reel (TR)	1000	$ 3.49
		2000	$ 3.34
		3000	$ 3.26
Newark	Each (Supplied on Cut Tape)	1	$ 6.68
		10	$ 4.89
		25	$ 4.42
		50	$ 4.13
		100	$ 3.84
		250	$ 3.51
		500	$ 3.30
		1000	$ 3.03

Description

General part information

ADF4118 Series

ADF4118 is a frequency synthesizer. It can be used to implement local oscillators (LO) in the up conversion and down conversion sections of wireless receivers and transmitters. It consist of a low noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus prescaler (P/P + 1). The A (5-bit) and B (13-bit) counters, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). It is used in application such as base stations for wireless radio; (GSM, PCS, DCS, CDMA, WCDMA), wireless handsets ; (GSM, PCS, DCS, CDMA, WCDMA), wireless LANs, communications test equipment, CATV equipment etc.