The AD9545 supports existing and emerging International Telecommunications Union (ITU) standards for the delivery of frequency, phase, and time of day over service provider packet networks, including ITU-G.8262, ITU-T G.812, ITU-T G.813, ITU-T G.823, ITU-T G.824, ITU-T G.825, and ITU-T G.8273.2.The 10 clock outputs of the AD9545 are synchronized to any one of up to four input references. The digital phase-locked loops (DPLLs) reduce timing jitter associated with the external references. The digitally controlled loop and holdover circuitry continuously generate a low jitter output signal, even when all reference inputs fail.The AD9545 is available in a 48-lead LFCSP (7 mm × 7 mm) package and operates over the −40°C to +85°C temperature range.Note that throughout the data sheet, multifunction pins, such as SDO/M5, are referred to either by the entire pin name or by a single function of the pin, for example, M5, when only that function is relevant.APPLICATIONSGlobal positioning system (GPS), PTP (IEEE 1588), and synchronous Ethernet (SyncE) jitter cleanup and synchronizationOptical transport networks (OTN), synchronous digital hierarchy (SDH), and macro and small cell base stationsSmall base station clocking, including baseband and radioStratum 2, Stratum 3e, and Stratum 3 holdover, jitter cleanup, and phase transient controlJESD204B support for analog-to-digital converter (ADC) and digital-to-analog converter (DAC) clockingCable infrastructuresCarrier Ethernet