Specification	HV2221FG-G

-3db Bandwidth	50 MHz
Applications	Ultrasound
Mounting Type	Surface Mount
Multiplexer/Demultiplexer Circuit	1:1
Number of Channels	8
On-State Resistance (Max) [Max]	23 Ohm
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Package / Case	48-LQFP
Supplier Device Package	48-LQFP (7x7)
Switch Circuit	SPST
Voltage - Supply, Dual (V±)	225 V
Voltage - Supply, Dual (V±) [Max]	100 V
Voltage - Supply, Dual (V±) [Min]	-100 V
Voltage - Supply, Single (V+) [Max]	50 V
Voltage - Supply, Single (V+) [Min]	15 V

HV2221 Series

8-Channel Low Charge Injection, Unipolar, Negative High Voltage Analog Switch

Part	Applications	-3db Bandwidth	Package / Case	Switch Circuit	Number of Channels	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Voltage - Supply, Single (V+) [Min]	Voltage - Supply, Single (V+) [Max]	Voltage - Supply, Dual (V±) [Min]	Voltage - Supply, Dual (V±) [Max]	Voltage - Supply, Dual (V±)	Multiplexer/Demultiplexer Circuit	On-State Resistance (Max) [Max]
Microchip Technology HV2221FG-G	Ultrasound	50 MHz	48-LQFP	SPST	8	48-LQFP (7x7)	70 °C	0 °C	Surface Mount	15 V	50 V	-100 V	100 V	225 V	1:1	23 Ohm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tray	250	$ 14.82
Microchip Direct	TRAY	1	$ 19.57
		25	$ 16.30
		100	$ 14.82
		1000	$ 14.32
		5000	$ 14.16

Description

General part information

HV2221 Series

HV2221 is a low charge injection, 8-channel, unipolar, negative high voltage, analog switch integrated circuit (IC) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as NDT ultrasound flaw detection, medical ultrasound imaging, piezoelectric transducer drivers, and printers.

Data is input into an 8-bit shift register that can then be retained in an 8-bit latch. To reduce any possible clock feed-through noise, the latch enable bar should be left high until all bits are clocked in. Data is clocked in during the rising edge of the clock.

Using HVCMOS technology, this device combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals.