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TQFP / 80
Integrated Circuits (ICs)

LAN9352/PT

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Microchip Technology

2-PORT 10/100 MANAGED ETHERNET SWITCH WITH 8/16-BIT NON-PCI CPU INTERFACE 80 TQFP 12X12X1MM TRAY ROHS COMPLIANT: YES

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TQFP / 80
Integrated Circuits (ICs)

LAN9352/PT

Active
Microchip Technology

2-PORT 10/100 MANAGED ETHERNET SWITCH WITH 8/16-BIT NON-PCI CPU INTERFACE 80 TQFP 12X12X1MM TRAY ROHS COMPLIANT: YES

Technical Specifications

Parameters and characteristics for this part

SpecificationLAN9352/PT
FunctionSwitch
InterfaceI2C, SPI
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Package / Case80-TQFP Exposed Pad
ProtocolEthernet
Standards10/100 Base-T/TX PHY
Supplier Device Package80-TQFP-EP (12x12)
Voltage - Supply [Max]3.3 V
Voltage - Supply [Min]1.8 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 119$ 12.03
Microchip DirectTRAY 1$ 14.93
25$ 12.44
100$ 11.31
1000$ 10.44
5000$ 9.91
NewarkEach 100$ 11.99

Description

General part information

LAN9352 Series

Microchip's LAN9352/LAN9352i is a high-performance, small-footprint, full-featured 2-port managed Ethernet switch. This device is application-optimized for consumer, embedded and Industrial designs which require a highly integrated, cost effective device with switching functionality, flexibility and ease of integration.

Featuring a small form factor 2-port switch, the LAN9352/9352i supports compact PCB design and with 2 Integrated PHY's. LAN9352 extends the definition of the LAN9353 by replacing the Port 0 MII/RMII/Turbo MII interface with a full featured Ethernet MAC accessible through a high-performance host bus or SPI/SQI Interface. The Host MAC incorporates the essential protocol requirements for operating an Ethernet/IEEE 802.3-compliant node and provides an interface between the Host Bus Interface (HBI) and the Ethernet PHYs and Switch Fabric. The device communicates with the microcontroller through an SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 8 or 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors with an 8 or 16-bit external bus. Alternatively, the device can be accessed via SPI/SQI. The Host MAC interfaces with the 10/100 Ethernet PHY’s (Virtual PHY, Port 1 PHY, Port 2 PHY) via an internal SMI (Serial Management Interface) bus.

IEEE 1588-2008 is supported via the integrated IEEE 1588-2008 hardware time stamp unit, which supports end-to-end and peer-to-peer transparent clocks. The LAN9352 complies with the IEEE 802.3 (full/half-duplex 10BASE-T and 100BASE-TX) Ethernet protocol, IEEE 802.3az Energy Efficient Ethernet (EEE) (100Mbps only), and 802.1D/802.1Q network management protocol specifications, enabling compatibility with industry standard Ethernet and Fast Ethernet applications. 100BASE-FX is supported via an external fiber transceiver.