Deep-Dive with AI
Search across all available documentation for this part.
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVC2G79YEPR |
|---|---|
| Clock Frequency | 160 MHz |
| Current - Output High, Low [x] | 32 mA |
| Current - Output High, Low [y] | 32 mA |
| Current - Quiescent (Iq) | 5 µA |
| Function | Standard |
| Input Capacitance | 3.5 pF |
| Max Propagation Delay @ V, Max CL | 4.5 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Non-Inverted |
| Package / Case | 8-XFBGA, DSBGA |
| Supplier Device Package | 8-DSBGA (1.9x0.9) |
| Supplier Device Package [x] | 1.9 |
| Supplier Device Package [y] | 0.9 |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 1211 | $ 0.25 | |
Description
General part information
SN74LVC2G79 Series
This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCCoperation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
Documents
Technical documentation and resources
