The ISO7220x-Q1 and ISO7221x-Q1 family devices are dual-channel digital isolators. To facilitate PCB layout, the channels are oriented in the same direction in the ISO7220x-Q1 and in opposite directions in the ISO7221x-Q1. These devices have a logic input and output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to 4000VPK per VDE. Used in conjunction with isolated power supplies, these devices block high voltage and isolate grounds, as well as prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to verify that the proper dc level of the output. If this dc-refresh pulse is not received every 4µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

The resulting time constant provides fast operation with signaling rates available from 0Mbps (DC) to 25Mbps (The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps). The A-option, and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise filter and the additional propagation delay.Read more