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TSSOP (PW)
Integrated Circuits (ICs)

SN74LVTH543PWR

Active
Texas Instruments

3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

TSSOP (PW)
Integrated Circuits (ICs)

SN74LVTH543PWR

Active
Texas Instruments

3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVTH543PWR
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]32 mA
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case24-TSSOP
Package / Case0.173 in, 4.4 mm
Supplier Device Package24-TSSOP
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.62
10$ 1.45
25$ 1.37
100$ 1.17
250$ 1.10
500$ 0.96
1000$ 0.80
Digi-Reel® 1$ 1.62
10$ 1.45
25$ 1.37
100$ 1.17
250$ 1.10
500$ 0.96
1000$ 0.80
Tape & Reel (TR) 2000$ 0.68
Texas InstrumentsLARGE T&R 1$ 1.22
100$ 1.00
250$ 0.72
1000$ 0.54

Description

General part information

SN74LVTH543-EP Series

These octal transceivers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

The ’LVTH543 devices contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register, to permit independent control in either direction of data flow.

The A-to-B enable (CEAB)\ input must be low to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using the CEBA\, LEBA\, and OEBA\ inputs.