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100-TQFP
Integrated Circuits (ICs)

ATXMEGA64A1U-AN

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Microchip Technology

MCU 8-BIT/16-BIT AVR RISC 64KB FLASH 1.8V/2.5V/3.3V 100-PIN CBGA

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100-TQFP
Integrated Circuits (ICs)

ATXMEGA64A1U-AN

Active
Microchip Technology

MCU 8-BIT/16-BIT AVR RISC 64KB FLASH 1.8V/2.5V/3.3V 100-PIN CBGA

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationATXMEGA64A1U-AN
ConnectivityIrDA, SPI, I2C, UART/USART, EBI/EMI
Core ProcessorAVR
Core Size8 Bit, 16 Bit
Data Converters4x12b, 16x12b
EEPROM Size2K x 8
Mounting TypeSurface Mount
Number of I/O78
Operating Temperature [Max]105 °C
Operating Temperature [Min]-40 °C
Oscillator TypeInternal
Package / Case100-TQFP
PeripheralsBrown-out Detect/Reset, DMA, POR, WDT, PWM
Program Memory Size64 KB
Program Memory TypeFLASH
RAM Size4K x 8
Speed32 MHz
Supplier Device Package100-TQFP (14x14)
Voltage - Supply (Vcc/Vdd) [Max]3.6 V
Voltage - Supply (Vcc/Vdd) [Min]1.6 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

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Description

General part information

ATxmega64A1U Series

The high-performance, low-power 8/16-bit AVR® XMEGA® microcontroller combines 64 KB ISP Flash memory (4 KB boot code section) with read-while-write capabilities, 2 KB EEPROM, 4 KB SRAM, four-channel event system, a programmable multi-level interrupt controller, 34 general purpose I/O lines, a 16-bit real-time counter, four flexible 16-bit timer/counters with compare modes and PWM, two USARTs, two Two-Wire Interfaces (TWIs), two Serial Peripheral Interfaces (SPIs), one 12-channel/12-bit A/D converter with optional differential input with programmable gain, two analog comparators with window mode, a programmable watchdog timer with separate internal oscillator, accurate internal oscillators with PLL and prescaler, and programmable Brown-out Detection. The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging, is available. By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching one MIPS per MHz, balancing power consumption and processing speed.

Documents

Technical documentation and resources