
Deep-Dive with AI
Search across all available documentation for this part.

Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | AD7701ARSZ |
|---|---|
| Architecture | Sigma-Delta |
| Configuration | S/H-ADC |
| Data Interface | SPI |
| Input Type | Single Ended |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Bits | 16 |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 28-SSOP |
| Package / Case [custom] | 0.209 in |
| Package / Case [custom] | 5.3 mm |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | External |
| Sampling Rate (Per Second) | 4k |
| Supplier Device Package | 28-SSOP |
| Voltage - Supply, Analog | 5 V |
| Voltage - Supply, Digital | 5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 38.55 | |
| 10 | $ 36.38 | |||
Description
General part information
AD7701 Series
The AD7701 is a 16-bit ADC which uses a sigma delta conversion technique. The analog input is continually sampled by an analog modulator whose mean output duty cycle is proportional to the input signal. The modulator output is processed by an on-chip digital filter with a six-pole Gaussian response, which updates the output data register with 16-bit binary words at word rates up to 4kHz. The sampling rate, filter corner frequency and output word rate are set by a master clock input that may be supplied externally, or by a crystal-controlled on-chip clock oscillator.The inherent linearity of the ADC is excellent, and endpoint accuracy is ensured by self-calibration of zero and full scale which may be initiated at any time. The self-calibration scheme can also be extended to null system offset and gain errors in the input channel.The output data is accessed through a flexible serial port, which has an asynchronous mode compatible with UARTs and two synchronous modes suitable for interfacing to shift registers or the serial ports of industry-standard microcontrollers.CMOS construction insures low power dissipation, and a power down mode reduces the idle power consumption to only 10 µW.
Documents
Technical documentation and resources