M95M04-DRMN6TP
ActiveEEPROM, 4 MBIT, 512K X 8BIT, SPI, 10 MHZ, NSOIC, 8 PINS
M95M04-DRMN6TP
ActiveEEPROM, 4 MBIT, 512K X 8BIT, SPI, 10 MHZ, NSOIC, 8 PINS
Technical Specifications
Parameters and characteristics for this part
| Specification | M95M04-DRMN6TP |
|---|---|
| Clock Frequency | 10 MHz |
| Memory Format | EEPROM |
| Memory Interface | SPI |
| Memory Organization | 512 K |
| Memory Size | 512 kB |
| Memory Type | Non-Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 C |
| Operating Temperature [Min] | -40 ¯C |
| Package / Case | 0.154 in |
| Package / Case | 8-SOIC |
| Package / Case | 3.9 mm |
| Supplier Device Package | 8-SOIC |
| Technology | EEPROM |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.8 V |
| Write Cycle Time - Word, Page [custom] | 5 ms |
| Write Cycle Time - Word, Page [custom] | 5 ms |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 2.91 | |
| 10 | $ 2.62 | |||
| 25 | $ 2.58 | |||
| 50 | $ 2.57 | |||
| 100 | $ 2.30 | |||
| 250 | $ 2.22 | |||
| 500 | $ 2.21 | |||
| 1000 | $ 2.06 | |||
| Digi-Reel® | 1 | $ 2.91 | ||
| 10 | $ 2.62 | |||
| 25 | $ 2.58 | |||
| 50 | $ 2.57 | |||
| 100 | $ 2.30 | |||
| 250 | $ 2.22 | |||
| 500 | $ 2.21 | |||
| 1000 | $ 2.06 | |||
| N/A | 10353 | $ 2.50 | ||
| Tape & Reel (TR) | 2500 | $ 2.03 | ||
| 5000 | $ 1.87 | |||
| Mouser | N/A | 1 | $ 2.76 | |
| 10 | $ 2.49 | |||
| 25 | $ 2.31 | |||
| 100 | $ 2.24 | |||
| 250 | $ 2.15 | |||
| 500 | $ 2.08 | |||
| 1000 | $ 2.01 | |||
| 2500 | $ 1.98 | |||
| 5000 | $ 1.93 | |||
Description
General part information
M95M04 Series
The M95M04-A125 and M95M04-A145 are 4-Mbit serial EEPROM automotive grade devices operating up to 145 °C. They are compliant with the very high level of reliability defined by the automotive standard AEC-Q100 grade 0.
The devices are accessed by a simple serial SPI compatible interface running at up to 10 MHz.
The memory array is based on advanced true EEPROM technology (electrically erasable programmable memory). The M95M04-A125 and M95M04-A145 are byte-alterable memories (524288 × 8 bits) organized as 1024 pages of 512 bytes in which the data integrity is significantly improved with an embedded error correction code logic.
Documents
Technical documentation and resources
