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8-UFDFpN 2x3
Integrated Circuits (ICs)

M34E04-FMC9TG

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STMicroelectronics

4 KBIT I2C BUS / SMBUS SERIAL EEPROM, SPD FOR DRAM MODULES (DDR4)

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8-UFDFpN 2x3
Integrated Circuits (ICs)

M34E04-FMC9TG

Active
STMicroelectronics

4 KBIT I2C BUS / SMBUS SERIAL EEPROM, SPD FOR DRAM MODULES (DDR4)

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationM34E04-FMC9TG
Memory FormatEEPROM
Memory InterfaceI2C
Memory Organization512 x 8
Memory Size512 B
Memory TypeNon-Volatile
Mounting TypeSurface Mount
Operating Temperature [Max]95 °C
Operating Temperature [Min]0 °C
Package / Case8-UFDFN Exposed Pad
Supplier Device Package8-UFDFPN (2x3)
TechnologyEEPROM
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.7 V
Write Cycle Time - Word, Page [custom]5 ms
Write Cycle Time - Word, Page [custom]5 ms

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.31
10$ 0.30
25$ 0.28
50$ 0.28
100$ 0.25
250$ 0.24
500$ 0.24
1000$ 0.23
Digi-Reel® 1$ 0.31
10$ 0.30
25$ 0.28
50$ 0.28
100$ 0.25
250$ 0.24
500$ 0.24
1000$ 0.23
N/A 7576$ 0.27
Tape & Reel (TR) 5000$ 0.21
10000$ 0.21
15000$ 0.21
25000$ 0.20

Description

General part information

M34E04 Series

The M34E04 is a 512-byte EEPROM device designed to operate the SMBus bus in the 1.7 V - 3.6 V voltage range, with a maximum of 1 MHz transfer rate in the 2.2 V - 3.6 V voltage range, over the JEDEC defined ambient temperature of 0°C / 95°C.

The M34E04 includes a 4-Kbit serial EEPROM organized as two pages of 256 bytes each, or 512 bytes of total memory. Each page is composed of two 128-byte blocks. The device is able to selectively lock the data in any or all of the four 128-byte blocks. Designed specifically for use in DRAM DIMMs (Dual Inline Memory Modules) with Serial Presence Detect, all the information concerning the DRAM module configuration (such as its access speed, its size, its organization) can be kept write-protected in one or more memory blocks.

The M34E04 device is protocol-compatible with the previous generation of 2-Kbit devices, M34E02. The page selection method allows commands used with legacy devices such as M34E02 to be applied to the lower or upper pages of the EEPROM.