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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LV4040ADR |
|---|---|
| Count Rate | 95 MHz |
| Direction | Up |
| Logic Type | Binary Counter |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 12 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Reset | Asynchronous |
| Supplier Device Package | 16-SOIC |
| Timing | Asynchronous |
| Trigger Type | Negative Edge |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.89 | |
| 10 | $ 0.79 | |||
| 25 | $ 0.75 | |||
| 100 | $ 0.62 | |||
| 250 | $ 0.58 | |||
| 500 | $ 0.51 | |||
| 1000 | $ 0.40 | |||
| Digi-Reel® | 1 | $ 0.89 | ||
| 10 | $ 0.79 | |||
| 25 | $ 0.75 | |||
| 100 | $ 0.62 | |||
| 250 | $ 0.58 | |||
| 500 | $ 0.51 | |||
| 1000 | $ 0.40 | |||
| Tape & Reel (TR) | 2500 | $ 0.38 | ||
| 5000 | $ 0.36 | |||
| 12500 | $ 0.34 | |||
| 25000 | $ 0.33 | |||
Description
General part information
SN74LV4040A-EP Series
The SN74LV4040A device is a 12 bit asynchronous binary counter with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The SN74LV4040A device is a 12 bit asynchronous binary counter with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits.
Documents
Technical documentation and resources
No documents available
