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48-SSOP
Integrated Circuits (ICs)

74ACT16374DLRG4

Unknown
Texas Instruments

IC FF D-TYPE DUAL 8BIT 48SSOP

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Search across all available documentation for this part.

48-SSOP
Integrated Circuits (ICs)

74ACT16374DLRG4

Unknown
Texas Instruments

IC FF D-TYPE DUAL 8BIT 48SSOP

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

Specification74ACT16374DLRG4
Clock Frequency65 MHz
Current - Output High, Low24 mA
Current - Quiescent (Iq)8 ÁA
FunctionStandard
Input Capacitance4.5 pF
Max Propagation Delay @ V, Max CL10.9 ns
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case48-BSSOP
Package / Case [y]0.295 in
Package / Case [y]7.5 mm
Supplier Device Package48-SSOP
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 1000$ 1.05
2000$ 0.98
5000$ 0.94
10000$ 0.90

Description

General part information

SN74ACT16374-EP Series

The SN54ACT16374 and 74ACT16374 are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.

An output-enable input (OE) can be used to place the outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state provides the capability to drive bus lines in a bus-organized system without need for interface or pullup components.OEdoes not affect the internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Documents

Technical documentation and resources

No documents available