STM32MP255CAI3
ActiveMPU WITH DUAL ARM CORTEX-A35 @1.2GHZ, CORTEX-M33 @400MHZ, 2XETHERNET, 3XFD-CAN, LVDS/DSI, H.264, 3D GPU, AI/NN, SECURE BOOT, CRYPTOGRAPHY, DRAM ENC/DEC, PKA
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STM32MP255CAI3
ActiveMPU WITH DUAL ARM CORTEX-A35 @1.2GHZ, CORTEX-M33 @400MHZ, 2XETHERNET, 3XFD-CAN, LVDS/DSI, H.264, 3D GPU, AI/NN, SECURE BOOT, CRYPTOGRAPHY, DRAM ENC/DEC, PKA
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Technical Specifications
Parameters and characteristics for this part
| Specification | STM32MP255CAI3 |
|---|---|
| Additional Interfaces | SPDIF, I2C, UART/USART, SPI, MMC/SD/SDIO, CANbus, DMA, GPIO |
| Co-Processors/DSP [custom] | GPU |
| Core Processor | ARM® Cortex®-M33, ARM® Cortex®-M0+, ARM® Cortex®-A35 |
| Display & Interface Controllers | LVDS, MIPI-CSI2, LCD |
| Ethernet | 10 Mbps, 100 Mbps, 1000 Mbps |
| Graphics Acceleration | True |
| Mounting Type | Surface Mount |
| Number of Cores/Bus Width [custom] | 2 |
| Number of Cores/Bus Width [custom] | 32-Bit |
| Number of Cores/Bus Width [custom] | 1 Core |
| Number of Cores/Bus Width [custom] | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 C |
| Package / Case | 436-TFBGA |
| RAM Controllers | DDR3L, DDR4, LPDDR4 |
| Security Features | ARM TZ, Boot Security, TRNG |
| Speed | 1.2 GHz |
| Supplier Device Package | 436-TFBGA (18x18) |
| USB | USB 2.0 (1), USB Type-C (1), USB 3.0 (1) |
| Voltage - I/O | 1.8 V, 3.3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 19.20 | |
Description
General part information
STM32MP255C Series
STM32MP25xC/F devices are based on the high-performance single or dual-core Arm® Cortex®-A35 64-bit RISC core operating at up to 1.5 GHz. The Cortex®‑A35 processor includes a 32-Kbyte L1 instruction cache for each CPU, a 32-Kbyte L1 data cache for each CPU, and a 512-Kbyte L2 cache. The Cortex®‑A35 processor uses a highly efficient 8-stage in-order pipeline that has been extensively optimized to provide full Armv8-A features while maximizing area and power efficiency.
STM32MP25xC/F devices also embed a Cortex®-M33 32-bit RISC core operating at up to 400 MHz frequency. The Cortex®-M33 core features a floating point unit (FPU) single precision which supports Arm® single-precision data-processing instructions, and data types. The Cortex®-M33 supports a full set of DSP instructions, TrustZone®, and a memory protection unit (MPU) which enhances application security.
The devices also embed a Cortex®-M0+ 32-bit RISC core operating at up to 200 MHz frequency (16 MHz when running from backup regulator). This processor is located in the SmartRun domain, and can be used to ensure very-low-power peripheral activity when all other processors and domains are stopped.
Documents
Technical documentation and resources
