Zenode.ai Logo
Beta
80-HTQFP
Integrated Circuits (ICs)

ADS5294IPFPT

Active
Texas Instruments

EIGHT-CHANNEL, 14-BIT, 80-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)

80-HTQFP
Integrated Circuits (ICs)

ADS5294IPFPT

Active
Texas Instruments

EIGHT-CHANNEL, 14-BIT, 80-MSPS ANALOG-TO-DIGITAL CONVERTER (ADC)

Technical Specifications

Parameters and characteristics for this part

SpecificationADS5294IPFPT
ArchitecturePipelined
ConfigurationS/H-ADC
Data InterfaceLVDS - Serial
FeaturesSimultaneous Sampling
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters8
Number of Bits14
Number of Inputs8
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case80-TQFP Exposed Pad
Ratio - S/H:ADC1:1
Reference TypeExternal, Internal
Sampling Rate (Per Second)80 M
Supplier Device Package80-HTQFP (12x12)
Voltage - Supply, Analog [Max]1.9 V
Voltage - Supply, Analog [Min]1.7 V
Voltage - Supply, Digital [Max]1.9 V
Voltage - Supply, Digital [Min]1.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 116.79
Digi-Reel® 1$ 116.79
Tape & Reel (TR) 250$ 97.95
Texas InstrumentsSMALL T&R 1$ 99.22
100$ 96.23
250$ 80.12
1000$ 74.60

Description

General part information

ADS5294 Series

The ADS5294 is a low-power 80-MSPS 8-Channel ADC that uses CMOS process technology and innovative circuit techniques. Low power consumption, high SNR, low SFDR, and consistent overload recovery allow users to design high-performance systems.

The digital processing block of the ADS5294 integrates several commonly used digital functions for improving system performance. The device includes a digital filter module that has built-in decimation filters (with lowpass, highpass and bandpass characteristics). The decimation rate is also programmable (by 2, by 4, or by 8). This rate is useful for narrow-band applications, where the filters are used to conveniently improve SNR and knock-off harmonics, while at the same time reducing the output data rate. The device includes an averaging mode where two channels (or even four channels) are averaged to improve SNR.

Serial LVDS outputs reduce the number of interface lines and enable the highest system integration. The digital data from each channel ADC is output over one or two wires of LVDS output lines depending on the ADC sampling rate. This 2-wire interface maintains a low serial-data rate, allowing low-cost FPGA-based receivers to be used even at a high sample rate. The ADC resolution is programmed to 12-bit or 14-bit through registers. A unique feature is the programmable-mapping module that allows flexible mapping between the input channels and the LVDS output pins. This module greatly reduces the complexity of LVDS-output routing, and by reducing the number of PCB layers, potentially results in cheaper system boards.