TPS516244.5 V to 28 V, 1/2-phase step-down driverless controller for Intel VR12.6 CPUs | Power Management (PMIC) | 2 | Active | The TPS51624 is a driverless, fully SVID compliant, VR12.6 step-down controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS51624 also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS51624 integrates the full complement of VR12.6 I/O features including VR_READY (PGOOD),ALERTandVR_HOT. The SVID interface address allows programming from 0 to 7. In PS4, the quiescent power consumption of controller is typical 0.25 mW. Adjustable control of VCPU slew rate and voltage positioning round out the VR12.6 features. Paired with the new TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS51624 works with selected TI Power Stage™ products for optimum efficiency as well as DrMOS products.
The TPS51624 package is a space saving, thermally enhanced 32-pin QFN that operates from -40°C to 105°C.
The TPS51624 is a driverless, fully SVID compliant, VR12.6 step-down controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS51624 also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS51624 integrates the full complement of VR12.6 I/O features including VR_READY (PGOOD),ALERTandVR_HOT. The SVID interface address allows programming from 0 to 7. In PS4, the quiescent power consumption of controller is typical 0.25 mW. Adjustable control of VCPU slew rate and voltage positioning round out the VR12.6 features. Paired with the new TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS51624 works with selected TI Power Stage™ products for optimum efficiency as well as DrMOS products.
The TPS51624 package is a space saving, thermally enhanced 32-pin QFN that operates from -40°C to 105°C. |
TPS516313-phase DCAP+ Step-Down Controller for VR12.5 CPUs | Special Purpose Regulators | 3 | Active | 3-phase DCAP+ Step-Down Controller for VR12.5 CPUs |
TPS51631A3-Phase, D-CAP+™ Step-Down Controller for VR12.5 Vcpu | Power Management (PMIC) | 1 | Active | The TPS51631A is a driverless step-down controller that is fully compliant with the SVID communications protocol, meeting the Intel VR12.5 specification. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS51631A also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS51631A integrates the full complement of VR12.5 I/O features including VR_READY (PGOOD),ALERTandVR_HOT. The SVID interface address allows programming from 0 to 7. Adjustable control of VCPU slew rate and voltage positioning round out the VR12.5 features. Paired with the new TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS51631A works with selected TI Power Stage™ products for optimum efficiency as well as DrMOS products.
The TPS51631A is available in space saving, thermally enhanced 32-pin QFN package that operates from –40°C to 105°C.
The TPS51631A is a driverless step-down controller that is fully compliant with the SVID communications protocol, meeting the Intel VR12.5 specification. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS51631A also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS51631A integrates the full complement of VR12.5 I/O features including VR_READY (PGOOD),ALERTandVR_HOT. The SVID interface address allows programming from 0 to 7. Adjustable control of VCPU slew rate and voltage positioning round out the VR12.5 features. Paired with the new TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS51631A works with selected TI Power Stage™ products for optimum efficiency as well as DrMOS products.
The TPS51631A is available in space saving, thermally enhanced 32-pin QFN package that operates from –40°C to 105°C. |
TPS51632NVIDIA Tegra 2.5V to 24V, 3/2/1-phase step-down controller for automotive applications | Special Purpose Regulators | 3 | Active | NVIDIA Tegra 2.5V to 24V, 3/2/1-phase step-down controller for automotive applications |
TPS51632-Q1NVIDIA Tegra 2.5V to 24V, 3/2/1-phase step-down controller for automotive applications | Integrated Circuits (ICs) | 1 | Active | The TPS51632-Q1 device is a driverless step-down controller with serial control. Advanced features such as D-CAP+ architecture provide fast transient response, lowest output capacitance, and high efficiency. The TPS51632-Q1 device supports both I2C and DVFS interfaces for dynamic control of the output voltage and current monitor telemetry. It also has dynamic phase add and drop control and enters single-phase, discontinuous-current-mode operation to maximize light-load efficiency.
The TPS51632-Q1 device supports Tegra requirements for PGOOD interrupts for MaxVID violations andnear OCPconditions. This interrupt behavior is programmable via I2C. Adjustable control of VCOREslew rate and voltage positioning round out the features. The TPS51604-Q1 driver is designed specifically for this generation of controllers. The TPS51632-Q1 device is packaged in a space saving, thermally-enhanced 32-pin VQFN and is rated to
The TPS51632-Q1 device is a driverless step-down controller with serial control. Advanced features such as D-CAP+ architecture provide fast transient response, lowest output capacitance, and high efficiency. The TPS51632-Q1 device supports both I2C and DVFS interfaces for dynamic control of the output voltage and current monitor telemetry. It also has dynamic phase add and drop control and enters single-phase, discontinuous-current-mode operation to maximize light-load efficiency.
The TPS51632-Q1 device supports Tegra requirements for PGOOD interrupts for MaxVID violations andnear OCPconditions. This interrupt behavior is programmable via I2C. Adjustable control of VCOREslew rate and voltage positioning round out the features. The TPS51604-Q1 driver is designed specifically for this generation of controllers. The TPS51632-Q1 device is packaged in a space saving, thermally-enhanced 32-pin VQFN and is rated to |
TPS516333-Phase, D-CAP+™ step-down controller for VR12.6/VR12.6+ VCPU | Power Management (PMIC) | 2 | Active | The TPS51633 device is a driverless step-down controller that is fully compliant with the SVID communications protocol, meeting the Intel VR12.6 specification. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS51633 device also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS51633 device integrates the full complement of VR12.6 I/O features including VR_READY (PGOOD),ALERTandVR_HOT. The SVID interface address allows programming from 0 to 7. In PS4, the quiescent power consumption of the controller is typically 0.25 mW. Adjustable control of VCPU slew rate and voltage positioning round out the VR12.6 features. Paired with the new TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS51633 device works with selected TI Power Stage™ products for optimum efficiency as well as DrMOS products. The TPS51633 device is available in space saving, thermally enhanced 32-pin QFN package that operates from –40°C to 105°C.
The TPS51633 device is a driverless step-down controller that is fully compliant with the SVID communications protocol, meeting the Intel VR12.6 specification. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS51633 device also supports single-phase operation in CCM or DCM for light-load efficiency. The TPS51633 device integrates the full complement of VR12.6 I/O features including VR_READY (PGOOD),ALERTandVR_HOT. The SVID interface address allows programming from 0 to 7. In PS4, the quiescent power consumption of the controller is typically 0.25 mW. Adjustable control of VCPU slew rate and voltage positioning round out the VR12.6 features. Paired with the new TPS51604 FET gate driver, the solution delivers exceptionally high speed and low switching loss. The TPS51633 device works with selected TI Power Stage™ products for optimum efficiency as well as DrMOS products. The TPS51633 device is available in space saving, thermally enhanced 32-pin QFN package that operates from –40°C to 105°C. |
| Power Management (PMIC) | 1 | Active | |
| Special Purpose Regulators | 1 | Active | |
TPS51650Dual Channel (3-Phase CPU / 2-Phase GPU) SVID, D-CAP+ Step-Down Controller for IMVP-7 Vcore | Power Management (PMIC) | 2 | Active | The TPS51650 and TPS59650 are dual-channel, fully SVID compliant IMVP-7 step-down controllers with two integrated gate drivers. Advanced control features such as D-CAP+ architecture with overlapping pulse support (undershoot reduction, USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. All of these controllers also support single-phase operation for light loads. The full compliment of IMVP-7 I/O is integrated into the controllers including dual PGOOD signals,ALERTandVR_HOT. Adjustable control of VCOREslew rate and voltage positioning round out the IMVP-7 features. In addition, the controllers' CPU channel includes two high-current FET gate drivers to drive high-side and low-side N-channel FETs with exceptionally high speed and low switching loss. The TPS51601 driver is used for the third phase of the CPU and the two phases of the GPU channel.
These controllers are packaged in a space-saving, thermally enhanced 48-pin QFN and are rated to operate from –10°C to 105°C.
The TPS51650 and TPS59650 are dual-channel, fully SVID compliant IMVP-7 step-down controllers with two integrated gate drivers. Advanced control features such as D-CAP+ architecture with overlapping pulse support (undershoot reduction, USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. All of these controllers also support single-phase operation for light loads. The full compliment of IMVP-7 I/O is integrated into the controllers including dual PGOOD signals,ALERTandVR_HOT. Adjustable control of VCOREslew rate and voltage positioning round out the IMVP-7 features. In addition, the controllers' CPU channel includes two high-current FET gate drivers to drive high-side and low-side N-channel FETs with exceptionally high speed and low switching loss. The TPS51601 driver is used for the third phase of the CPU and the two phases of the GPU channel.
These controllers are packaged in a space-saving, thermally enhanced 48-pin QFN and are rated to operate from –10°C to 105°C. |
| Special Purpose Regulators | 2 | Active | |
