TPS75233-EP2-A, ultra-low-dropout voltage regulator with enable & RESET with delay | Voltage Regulators - Linear, Low Drop Out (LDO) Regulators | 20 | Active | The TPS752xx and TPS754xx are low dropout regulators with integrated power-on reset and power good (PG) functions respectively. These devices are capable of supplying 2 A of output current with a dropout of 210 mV (TPS75233, TPS75433). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS752xx and TPS754xx are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 210 mV at an output current of 2 A for the TPS75x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 2 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when the EN\ pin is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ= 25°C.
The RESET\ (SVS, POR, or power on reset) output of the TPS752xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS754xx has a power good terminal (PG) as an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The TPS752xx or the TPS754xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS752xx and the TPS754xx families are available in 20 pin TSSOP (PWP) packages.
The TPS752xx and TPS754xx are low dropout regulators with integrated power-on reset and power good (PG) functions respectively. These devices are capable of supplying 2 A of output current with a dropout of 210 mV (TPS75233, TPS75433). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS752xx and TPS754xx are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 210 mV at an output current of 2 A for the TPS75x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 2 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when the EN\ pin is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ= 25°C.
The RESET\ (SVS, POR, or power on reset) output of the TPS752xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS754xx has a power good terminal (PG) as an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The TPS752xx or the TPS754xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS752xx and the TPS754xx families are available in 20 pin TSSOP (PWP) packages. |
TPS75301-EPEnhanced product, fast transient response 1.5-A low-dropout voltage regular | Voltage Regulators - Linear, Low Drop Out (LDO) Regulators | 1 | Active | The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ= 25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages.
The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ= 25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages. |
TPS75325-EPEnhanced product, fast transient response 1.5-A low-dropout voltage regular | Power Management (PMIC) | 1 | Active | The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ= 25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages.
The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ= 25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages. |
TPS75333Enhanced product, fast transient response 1.5-A low-dropout voltage regular | Power Management (PMIC) | 18 | Active | The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ= 25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages.
The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ= 25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages. |
TPS75333-EPEnhanced product, fast transient response 1.5-A low-dropout voltage regular | Power Management (PMIC) | 1 | Active | The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ= 25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages.
The TPS753xxQ and TPS751xxQ are low dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS751xxQ and TPS753xxQ are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1µA at TJ= 25°C.
For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The RESET\ (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.
The TPS751xxQ or TPS753xxQ is offered in 1.5-V, 1.8-V, 2.5-V and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in 20-pin TSSOP (PWP) packages. |
TPS754012-A, ultra-low-dropout voltage regulator with power good & enable | Voltage Regulators - Linear, Low Drop Out (LDO) Regulators | 6 | Active | The TPS752xxQ and TPS754xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 2 A of output current with a dropout of 210 mV (TPS75233Q, TPS75433Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. These devices are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically210 mV at an output current of 2 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 2 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled whenENis connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal toEN(enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ= +25°C.
TheRESET(SVS, POR, or power on reset) output of the TPS752xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage,RESETgoes to a high-impedance state after a 100-ms delay.RESETgoes to a logic-low state when the regulated output voltage is pulled below 95% (that is, during an overload condition) of its regulated voltage.
The TPS754xxQ has a power good terminal (PG) as an active high, open drain output for use with a power-on reset or a low-battery indicator.
The TPS754xxQ and TPS752xxQ are offered in 1.5 V, 1.8 V, 2.5 V and 3.3 V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS754xxQ and TPS752xxQ families are available in a 20-pin TSSOP (PWP) package.
The TPS752xxQ and TPS754xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 2 A of output current with a dropout of 210 mV (TPS75233Q, TPS75433Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. These devices are designed to have fast transient response for larger load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically210 mV at an output current of 2 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 2 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled whenENis connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal toEN(enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ= +25°C.
TheRESET(SVS, POR, or power on reset) output of the TPS752xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage,RESETgoes to a high-impedance state after a 100-ms delay.RESETgoes to a logic-low state when the regulated output voltage is pulled below 95% (that is, during an overload condition) of its regulated voltage.
The TPS754xxQ has a power good terminal (PG) as an active high, open drain output for use with a power-on reset or a low-battery indicator.
The TPS754xxQ and TPS752xxQ are offered in 1.5 V, 1.8 V, 2.5 V and 3.3 V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS754xxQ and TPS752xxQ families are available in a 20-pin TSSOP (PWP) package. |
| Power Management (PMIC) | 1 | Unknown | |
| Integrated Circuits (ICs) | 1 | Unknown | |
TPS755015-A, ultra-low-dropout voltage regulator with power good & enable | Evaluation Boards | 24 | Active | The TPS755xx family of 5-A low dropout (LDO) regulators contains four fixed voltage option regulators with integrated power-good (PG\) and an adjustable voltage option regulator. These devices are capable of supplying 5 A of output current with a dropout of 250 mV (TPS75533). Therefore, the device is capable of performing a 3.3-V to 2.5-V conversion. Quiescent current is 125 uA at full load and drops down to less than 1 uA when the device is disabled. The TPS755xx is designed to have fast transient response for large load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 250 mV at an output current of 5 A for the TPS75533) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 125 uA over the full range of output current). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low-level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1 uA at TJ= 25°C. The power-good terminal (PG\) is an active low, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The TPS755xx is offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.22 V to 5 V). Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS755xx family is available in a 5-pin TO\x96220 (KC) and TO\x96263 (KTT) packages.
The TPS755xx family of 5-A low dropout (LDO) regulators contains four fixed voltage option regulators with integrated power-good (PG\) and an adjustable voltage option regulator. These devices are capable of supplying 5 A of output current with a dropout of 250 mV (TPS75533). Therefore, the device is capable of performing a 3.3-V to 2.5-V conversion. Quiescent current is 125 uA at full load and drops down to less than 1 uA when the device is disabled. The TPS755xx is designed to have fast transient response for large load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 250 mV at an output current of 5 A for the TPS75533) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 125 uA over the full range of output current). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN\ is connected to a low-level voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to less than 1 uA at TJ= 25°C. The power-good terminal (PG\) is an active low, open drain output, which can be used to implement a power-on reset or a low-battery indicator.
The TPS755xx is offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.22 V to 5 V). Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS755xx family is available in a 5-pin TO\x96220 (KC) and TO\x96263 (KTT) packages. |
TPS756255-A, ultra-low-dropout voltage regulator with enable | Voltage Regulators - Linear, Low Drop Out (LDO) Regulators | 17 | Active | The TPS756xx family of 5-A low dropout (LDO) regulators contains four fixed voltage option regulators and an adjustable voltage option regulator. These devices are capable of supplying 5 A of output current with a dropout of 250 mV (TPS75633). Therefore, the device is capable of performing a 3.3-V to 2.5-V conversion.
Quiescent current is 125 µA at full load and drops down to less than 1 µA when the device is disabled. The TPS756xx is designed to have fast transient response for large load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 250 mV at an output current of 5 A for the TPS75633) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 125 µA over the full range of output current). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN (enable) is connected to a high voltage level (> 2 V). Applying a low voltage level (< 0.7 V) to EN shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ= 25°C.
The TPS756xx is offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.22 V to 5 V). Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS756xx family is available in a 5-pin TO–220 (KC) and TO–263 (KTT) packages.
The TPS756xx family of 5-A low dropout (LDO) regulators contains four fixed voltage option regulators and an adjustable voltage option regulator. These devices are capable of supplying 5 A of output current with a dropout of 250 mV (TPS75633). Therefore, the device is capable of performing a 3.3-V to 2.5-V conversion.
Quiescent current is 125 µA at full load and drops down to less than 1 µA when the device is disabled. The TPS756xx is designed to have fast transient response for large load current changes.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 250 mV at an output current of 5 A for the TPS75633) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 125 µA over the full range of output current). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when EN (enable) is connected to a high voltage level (> 2 V). Applying a low voltage level (< 0.7 V) to EN shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ= 25°C.
The TPS756xx is offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.22 V to 5 V). Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS756xx family is available in a 5-pin TO–220 (KC) and TO–263 (KTT) packages. |
