74ALS580Octal D-Type Transparent Latches With 3-State Outputs | Latches | 4 | Active | These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, outputs (Q\) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.
A buffered output-enableinput can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.
does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN54ALS580B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS580B and SN74AS580 are characterized for operation from 0°C to 70°C.
These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, outputs (Q\) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.
A buffered output-enableinput can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.
does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN54ALS580B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS580B and SN74AS580 are characterized for operation from 0°C to 70°C. |
| Logic | 3 | Active | |
74ALS621OCTAL BUS TRANSCEIVER/IOL=48mA O.C. | Integrated Circuits (ICs) | 7 | Active | These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
The -1 versions of the SN74ALS620A and SN74ALS621A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS620A, SN74ALS621A, SN74ALS623A, and SN74AS623 are characterized for operation from 0°C to 70°C. |
| Logic | 6 | Active | |
| Integrated Circuits (ICs) | 1 | Active | |
| Buffers, Drivers, Receivers, Transceivers | 7 | Active | |
| Integrated Circuits (ICs) | 3 | Active | These octal bus transceivers are designed for asynchronous two-way communication between open-collector and 3-state buses. The devices transmit data from the A bus (open-collector) to the B bus (3 state) or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable () input can be used to disable the device so the buses are isolated.
The -1 version of SN74ALS638A is identical to the standard version, except that the recommended maximum IOLis increased to 48 mA.
The SN74ALS638A, SN74ALS639A, SN74AS638A, and SN74AS639 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between open-collector and 3-state buses. The devices transmit data from the A bus (open-collector) to the B bus (3 state) or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable () input can be used to disable the device so the buses are isolated.
The -1 version of SN74ALS638A is identical to the standard version, except that the recommended maximum IOLis increased to 48 mA.
The SN74ALS638A, SN74ALS639A, SN74AS638A, and SN74AS639 are characterized for operation from 0°C to 70°C. |
| Buffers, Drivers, Receivers, Transceivers | 11 | Active | |
74ALS641Octal Bus Transceivers With Open-Collector Outputs | Buffers, Drivers, Receivers, Transceivers | 7 | Active | These octal bus transceivers are designed for asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enableinput disables the device so that the buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enableinput disables the device so that the buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C. |
| Integrated Circuits (ICs) | 8 | Active | These octal bus transceivers are designed for asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enableinput disables the device so that the buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C.
These octal bus transceivers are designed for asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enableinput disables the device so that the buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum IOLis increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C. |
