STMicroelectronics

The M34E04 is a 512-byte EEPROM device designed to operate the SMBus bus in the 1.7 V - 3.6 V voltage range, with a maximum of 1 MHz transfer rate in the 2.2 V - 3.6 V voltage range, over the JEDEC defined ambient temperature of 0°C / 95°C. The M34E04 includes a 4-Kbit serial EEPROM organized as two pages of 256 bytes each, or 512 bytes of total memory. Each page is composed of two 128-byte blocks. The device is able to selectively lock the data in any or all of the four 128-byte blocks. Designed specifically for use in DRAM DIMMs (Dual Inline Memory Modules) with Serial Presence Detect, all the information concerning the DRAM module configuration (such as its access speed, its size, its organization) can be kept write-protected in one or more memory blocks. The M34E04 device is protocol-compatible with the previous generation of 2-Kbit devices, M34E02. The page selection method allows commands used with legacy devices such as M34E02 to be applied to the lower or upper pages of the EEPROM. Individually locking a 128-byte block may be accomplished using a software write protection mechanism in conjunction with a high input voltage VHV on input SA0. By sending the device a specific SMBus sequence, each block may be protected from writes until the write protection is electrically reversed using a separate SMBus sequence which also requires VHV on input SA0. The write protection for all four blocks is cleared simultaneously.

The M41ST85W is a combination serial real-time clock, microprocessor supervisor, and NVRAM supervisor. It is built in a low-power CMOS SRAM process and has a 64-byte memory space with 44 bytes of NVRAM and 20 memory-mapped RTC registers. The RTC registers are configured in binary coded decimal (BCD) format. The M41ST85W combines a 400 kHz I²C serial RTC with an automatic backup battery switchover circuit for powering an external LPSRAM as well as the internal RTC. When power begins to fail, the switchover automatically connects to the backup battery to keep the RTC and external LPSRAM alive in the absence of system power. Access to the LPSRAM is also cut off via a chip-enable gate function, thereby write-protecting the memory. A programmable watchdog and power-on reset/low voltage detect function are the key elements in the microprocessor supervisor section. The real-time clock includes a built-in 32.768 kHz oscillator (crystal-controlled), which provides the time base for the timekeeping and calendar functions. Eight of the 20 clock registers provide the basic clock/calendar functions while the other 12 bytes provide status/control for the alarm, watchdog, and squarewave functions. RTC addresses and data are transferred serially via the two-line, bidirectional I²C interface. The built-in address register is incremented automatically after each WRITE or READ data byte. The M41ST85W has a built-in power sense circuit which detects power failures and automatically switches to the backup battery when a power failure occurs. During an outage, the power to sustain the SRAM and clock operations is typically supplied by a small lithium button-cell battery as is the case when using the SNAPHAT®package option. Functions available to the user include a non-volatile, time-of-day clock/calendar, alarm interrupts, watchdog timer, and programmable squarewave generator. Other features include a power-on reset as well as two additional debounce reset inputs (RSTIN1andRSTIN2) which can also generate an output reset (RST). The eight registers for basic clock/calendar functions contain the century, year, month, date, day, hour, minute, second, and tenths/hundredths of a second in 24-hour BCD format. Corrections for 28, 29 (leap year - valid until year 2100), 30 and 31 day months are made automatically. The M41ST85W is offered in two 28-lead SOIC packages. The 300 mil SOH28 SNAPHAT®IC package mates with ST’s SNAPHAT battery/crystal top (ordered separately). SNAPHAT battery options include 48 mAh and 120 mAh. ST’s 300 mil SOX28 embedded crystal IC includes the 32 KHz crystal and is perfect for applications where a low profile is a must. The SOH28 SNAPHAT SOIC includes sockets with gold plated contacts at both ends for direct connection to the SNAPHAT top. The SNAPHAT battery/crystal top is inserted atop the IC package after the completion of the surface mount assembly process which avoids potential battery and crystal damage due to the high temperatures required for device surface-mounting. The unique design allows the battery to be replaced, thus extending the life of the RTC and NVRAM indefinitely. The SNAPHAT top is keyed to prevent reverse insertion. The SNAPHAT IC and SNAPHAT tops are shipped separately. The ICs are available in plastic anti-static tubes or in tape & reel form. The SNAPHAT tops are shipped in plastic anti-static tubes. The part numbers are M4T28-BR12SH1 (48 mAh) and M4T32-BR12SH1 (120 mAh). For the extended temperature requirement, the 120 mAh M4T32-BR12SH6 is available.

The M41ST87Y/W secure serial RTC and NVRAM supervisor is a low power 1280-bit, static CMOS SRAM organized as 160 bytes by 8 bits. A built-in 32.768 kHz oscillator (internal crystal-controlled) and 8 bytes of the SRAM are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. An additional 11 bytes of RAM provide calibration, status/control of alarm, watchdog, tamper, and square wave functions. 8 bytes of ROM and finally 128 bytes of user RAM are also provided. Addresses and data are transferred serially via a two line, bidirectional I2C interface. The built-in address register is incremented automatically after each WRITE or READ data byte. The M41ST87Y/W has a built-in power sense circuit which detects power failures and automatically switches to the battery supply when a power failure occurs. The energy needed to sustain the SRAM and clock operations can be supplied by a small lithium button-cell supply when a power failure occurs. Functions available to the user include a non-volatile, time-of-day clock/calendar, alarm interrupts, tamper detection, watchdog timer, and programmable square wave output. Other features include a power-on reset as well as two additional debounced inputs (RSTIN1andRSTIN2) which can also generate an output reset (RST). The eight clock address locations contain the century, year, month, date, day, hour, minute, second and tenths/hundredths of a second in 24-hour BCD format. Corrections for 28, 29 (leap year), 30 and 31 day months are made automatically.

The M41T00AUD is a low-power serial real-time clock (RTC) with an integral audio section with tone generator and 300 mW output amplifier. The RTC is a superset of the M41T00 with enhancements such as a precision reference for switchover, an oscillator fail detect circuit, and storing of the time at power-down. The audio section includes a summing amplifier (inverting) at the input. An 8 kHz low-pass filter follows that with a 16-step programmable gain stage next. A 256 or 512 Hz audio tone can be switched into the filter in place of the input signal. From the gain stage, the 300 mW amplifier drives the output pins. The M41T00AUD has a built-in power sense circuit which detects power failures and automatically switches to the backup input when VCCis removed. Backup power can be supplied by a capacitor or by a battery such as a lithium coin cell. The device includes a trickle charge circuit for charging the capacitor. The RTC includes a built-in 32.768 kHz oscillator controlled by an external crystal. Eight register bytes are used for the clock/calendar functions and are superset compatible with the M41T00. Two additional registers control the audio section and the trickle charger. The 10 registers are accessed over a 400 kHz I2C bus. The address register increments automatically after each byte READ or WRITE operation thus streamlining transfers by eliminating the need to send a new address for each byte to be transferred. Typical data retention times will be in excess of 5 years with a 50 mAh 3 V lithium cell.