Renesas Electronics Corporation

The 844008I-01 is an 8 output LVDS synthesizer optimized to generate GbE/10GbE reference clock frequencies and is a member of the HiPerClocks™ family of high performance clock solutions. Using a 25MHz parallel resonant crystal, the following frequencies can be generated based on the F_SEL pin: 125MHz or 156.25MHz. The 844008I-01 uses our 3rd generation low phase noise VCO technology and can achieve <1ps typical rms phase jitter, easily meeting GbE/10GbE jitter requirements. The 844008I-01 is packaged in a 32-pin TQFP or 32 VFQFN packages.

The 844021I-01 is an Ethernet clock generator that uses an 18pF parallel resonant crystal over the range of 24.5MHz – 34MHz. For Ethernet applications, a 25MHz crystal is used. The 844021I-01 has excellent <1ps phase jitter performance, over the 1.875MHz – 20MHz integration range. The 844021I-01 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space.

The 844071 is a Serial ATA (SATA)/Serial Attached SCSI (SAS) clock generator that uses an 18pF parallel resonant crystal over the range of 20.833MHz - 28.3MHz. For SATA/SAS applications, a 25MHz crystal is used and either 75MHz or 150MHz may be selected with the FREQ_SEL pin. The 844071 has excellent <1ps phase jitter performance, over the 900kHz - 7.5MHz integration range. The 844071 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space.

The 8442 is a general purpose, dual output Crystal-to-Differential LVDS High Frequency Synthesizer. The 8442 has a selectable TEST_CLK or crystal input. The TEST_CLK input accepts LVCMOS or LVTTL input levels and translates them to LVDS levels. The VCO operates at a frequency range of 250MHz to 700MHz. The VCO frequency is programmed in steps equal to the value of the input reference or crystal frequency. The VCO and output frequency can be programmed using the serial or parallel interface to the configuration logic. The low phase noise characteristics of the 8442 makes it an ideal clock source for Gigabit Ethernet and Sonet applications.

The 844201I-45 is a PCI Express clock generator. The 844201I-45 can synthesize 100MHz or 125MHz reference clock frequencies with a 25MHz crystal. The 844201I-45 has excellent phase jitter performance and is packaged in a small 16-pin VFQFN, making it ideal for use in systems with limited board space.

The 844256DI is a Crystal-to-LVDS Clock Synthesizer/Fanout Buffer designed for SONET and Gigabit Ethernet applications. The output frequency can be set using the frequency select pins and a 25MHz crystal for Ethernet frequencies, or a 19.44MHz crystal for SONET. The low phase noise characteristics of the 844256DI make it an ideal clock for these demanding applications.

The 844441I is a low jitter, high performance clock generator and a member of the FemtoClock®family of silicon timing products. The 844441I is designed for use in applications using the SAS and SATA interconnect. The 844441I uses an external, 25MHz, parallel resonant crystal to generate four selectable output frequencies: 75MHz, 100MHz, 150MHz, and 300MHz. This silicon based approach provides excellent frequency stability and reliability. The 844441I features down and center spread spectrum (SSC) clocking techniques.

The 844S42I is a 3.3V compatible, PLL based clock synthesizer targeted for clock generation in high-performance instrumentation, networking and computing applications. Using either the serial (I2C) or parallel programming interface, the 844S42I enables the generation of clock frequencies in the range of 81MHz to 2592MHz. The internal crystal oscillator uses the external quartz crystal as the basis of its frequency reference. Alternatively, a LVCMOS compatible clock signal can be used as PLL reference signal. The devices uses an integer-N synthesizer architecture and is optimized for low-jitter generation. The VCO within the PLL operates over a range of 1296MHz to 2592MHz. Its output is scaled by a divider that is configured by either the I2C or parallel interfaces. The crystal oscillator frequency fXTAL, the PLL pre-divider P, the feedback-divider M and the PLL post-divider N determine the output frequency. The feedback path of the PLL is internal. The PLL post-dividers NA and NB are configured through either the I2C or the parallel interfaces, each can provide one of seven division ratios (1, 2, 3, 4, 6, 8, 16). This divider extends the performance of the part while providing a typical 50% duty cycle. The high-frequency outputs QA and QB are differential and are capable of driving a pair of transmission lines. The positive supply voltage for the internal PLL is separated from the power supply for the core logic and output drivers to minimize noise induced jitter. The serial interface is I2C compatible and provides read and write access to the internal PLL configuration registers. The lock state of the PLL is indicated by the LVCMOS-compatible LOCK_DT output. This device provides a clock enable control input that, when active (LOW), allows the outputs to switch normally, and when inactive (HIGH), places the outputs in a high impedance state. The 844S42I is packaged in a 8mm x 8mm 56-lead VFQFN package.

The 845252I is a 3.3V/2.5V CML clock generator designed for Ethernet applications. The device synthesizes either a 50MHz, 62.5MHz, 100MHz, 125MHz, 156.25MHz, 250MHz or 312.5MHz clock signal with excellent phase jitter performance. The clock signal is distributed to two low-skew differential CML outputs. The device is suitable for driving the reference clocks of Ethernet PHYs. The device supports 3.3V and 2.5V voltage supply and is packaged in a small, lead-free (RoHS 6) 32-lead VFQFN package. The extended temperature range supports telecommunication, wireless infrastructure and networking end equipment requirements.