Renesas Electronics Corporation

The ISL59885 video sync separator extracts sync timing information from both standard and non-standard video inputs in the presence of Macrovision pulses. The ISL59885 provides horizontal, vertical, and composite sync outputs as well as SD/HDTV detection. An auto input frequency detect feature automatically adapts to a wide range of video standards (it does not need a different RSET resistor for different frequencies). The vertical sync pulse is output on the rising edge of the first vertical serration following the vertical pre-equalizing string. For non-standard vertical inputs, a default vertical pulse is output when the vertical signal stays low for longer than the vertical sync default delay time. The horizontal output gives horizontal timing with pre/post equalizing pulses. Fixed 70mV sync tip slicing provides sync edge detection when the video input level is between 0. 5VP-Pand 2VP-P. The ISL59885 is available in an 8 Ld SOIC package and is specified for operation over the full -40°C to +85°C temperature range.

The ISL59911 is a triple channel differential receiver and equalizer optimized for RGB and YPbPr video signals. It contains three high speed differential receivers with programmable frequency compensation. The ISL59911 features manual or automatic offset calibration and ±4dB of gain adjustment range with a resolution of 0. 1dB. The ISL59911 has a bandwidth of 250MHz and consumes only 110mA from a ±5V supply in normal operation. When deasserted, the ENABLE pin puts the amplifiers into a low power, high impedance state, minimizing power when not needed and also allowing multiple devices to be connected in parallel, allowing two or more ISL59911 devices to function as a multiplexer. The ISL59911 can also directly decode the sync signals encoded onto the common modes of three pairs of Cat 5 cable (by an ISL59311, EL4543, or similar device) or it can output the actual common mode voltages for each of the three channels. The ISL59911 is available in a 32 Ld QFN package and is specified for operation over the full -40°C to +85°C temperature range.

The ISL59920, ISL59921, ISL59922, and ISL59923 are triple analog delay lines that provide skew compensation between three high-speed signals. These parts are ideal for compensating for the skew introduced by a typical CAT-5, CAT-6 or CAT-7 cable (with differing electrical lengths on each twisted pair) when transmitting analog video. Using a simple serial interface, the ISL59920, ISL59921, ISL59922, and ISL59923’s delays are programmable in steps of 2, 1. 5, 1, or 2ns (respectively) for up to a total delay of 62, 46. 5, 31, or 30ns (respectively) on each channel. The gain of the video amplifiers can be set to x1 (0dB) or x2 (6dB) for back-termination. The delay lines require a ±5V supply.

The ISL60002 FGA voltage references are very high precision analog voltage references fabricated using the Renesas proprietary Floating Gate Analog (FGA) technology and feature low supply voltage operation at ultra-low 350nA operating current. Additionally, the ISL60002 family features guaranteed initial accuracy as low as ±1. 0mV and 20ppm/°C temperature coefficient. The initial accuracy and temperature stability performance of the ISL60002 family, plus the low supply voltage and 350nA power consumption, eliminates the need to compromise thermal stability for reduced power consumption, making it an ideal companion to high resolution, low power data conversion systems. Special Note: Post-assembly x-ray inspection may lead to permanent changes in device output voltage and should be minimized or avoided.

This fully featured hot swap power controller targets +12V applications. The ISL6115A with its integrated charge pump has a higher (6. 5V vs 5V) gate drive than its sister part the ISL6115 making this part an immediate efficiency improvement replacement. This IC features programmable overcurrent (OC) detection, current regulation (CR) with time delay to latch-off and soft-start. The current regulation level is set by 2 external resistors; RISETsets the CR Vth and the other is a low ohmic sense resistor across, which the CR Vth is developed. The CR duration is set by an external capacitor on the CTIM pin, which is charged with a 20µA current once the CR Vth level is reached. The IC then quickly pulls down the GATE output latching off the pass FET.

The ISL6119 is a USB dual port power controller, fully independent overcurrent (OC) fault protection IC. Operational over the +2. 5V to +5. 5V range, this device features internal current monitoring, accurate current limiting, integrated power switches and current limited delay to latch-off for system protection. The ISL6119 current sense and limiting circuitry sets the current limit to a nominal 1A, making this device well suited for the USB port power management application. The ISL6119 provides OC fault notification, accurate current limiting and a consistent timed latch-off thus isolating and protecting the voltage bus in the presence of an OC event or short circuit. The 12ms time to latch-off is independent of the adjoining switch's electrical or thermal condition and the OC response time is inversely related to the OC magnitude. Each ISL6119 incorporates in a single 8 lead SOIC package two 80mΩ N-channel MOSFET power switches for power control. Each switch is driven by a constant current source giving a controlled ramp up of the output voltage. This provides a soft start turn-on eliminating bus voltage drooping caused by inrush current while charging heavy load capacitances. Independent enabling inputs and fault reporting outputs for each channel are compatible with 3V and 5V logic to allow external control and monitoring. The ISL6119 undervoltage lockout feature prevents turn-on of the outputs unless the correct ENABLE state and VIN > 2. 5V are present. During initial turn-on the ISL6119 prevents fault reporting by blanking the fault signal. Rising and falling outputs are current limited voltage ramps so that both the inrush current and voltage slew rate are limited, independent of load. This reduces supply droop due to surge and eliminates the need for external EMI filters. During operation, once an OC condition is detected the appropriate output is current limited for 12ms to allow transient conditions to pass. If still in current limit after the current limit period has elapsed, the output is then latched off and the fault is reported by pulling the corresponding FAULT low. The FAULT signal is latched low until reset by the ENABLE signal being de-asserted at which time the FAULT signal will clear.