Renesas Electronics Corporation

The DG444 and DG445 monolithic CMOS analog switches are drop-in replacements for the popular DG211 and DG212 series devices. They include four independent single pole single throw (SPST) analog switches and TTL and CMOS compatible digital inputs. These switches feature lower analog ON resistance (85Ω) and faster switch time (tON250ns) compared to the DG211 and DG212. Charge injection has been reduced, simplifying sample and hold applications. The improvements in the DG444 series are made possible by using a high voltage silicon-gate process. An epitaxial layer prevents the latch-up associated with older CMOS technologies. The 44V maximum voltage range permits controlling ±20V signals when operating with ±20V power supplies. The four switches are bilateral, equally matched for AC or bidirectional signals. The ON resistance variation with analog signals is quite low over a ±5V analog input range. The switches in the DG444 and DG445 are identical, differing only in the polarity of the selection logic.

The DG444 and DG445 monolithic CMOS analog switches are drop-in replacements for the popular DG211 and DG212 series devices. They include four independent single pole single throw (SPST) analog switches and TTL and CMOS compatible digital inputs. These switches feature lower analog ON resistance (85Ω) and faster switch time (tON250ns) compared to the DG211 and DG212. Charge injection has been reduced, simplifying sample and hold applications. The improvements in the DG444 series are made possible by using a high voltage silicon-gate process. An epitaxial layer prevents the latch-up associated with older CMOS technologies. The 44V maximum voltage range permits controlling ±20V signals when operating with ±20V power supplies. The four switches are bilateral, equally matched for AC or bidirectional signals. The ON resistance variation with analog signals is quite low over a ±5V analog input range. The switches in the DG444 and DG445 are identical, differing only in the polarity of the selection logic.

The EL1881 video sync separator is manufactured using Elantec's high performance analog CMOS process. This device extracts sync timing information from both standard and non-standard video input. It provides composite sync, vertical sync, burst/back porch timing, and odd/even field detection. Fixed 70mV sync tip slicing provides sync edge detection when the video input level is between 0. 5VP-Pand -2VP-P(sync tip amplitude 143mV to 572mV). A single external resistor sets all internal timing to adjust for various video standards. The composite sync output follows video in sync pulses and a vertical sync pulse is output on the rising edge of the first vertical serration following the vertical pre-equalizing string. For non-standard vertical inputs, a default vertical pulse is output when the vertical signal stays low for longer than the vertical sync default delay time. The odd/even output indicates field polarity detected during the vertical blanking interval. The EL1881 is plug-in compatible with the industry-standard LM1881 and can be substituted for that part in 5V applications with lower required supply current. The EL1881 is available in the 8 Ld PDIP and SOIC packages and is specified for operation over the full -40°C to +85°C temperature range.

The EL1883 video sync separator is manufactured using Elantec's high performance analog CMOS process. This device extracts sync timing information from both standard and non-standard video input and also in the presence of Macrovision pulses. It provides composite sync, vertical sync, burst/back porch timing, and horizontal outputs. Fixed 70mV sync tip slicing provides sync edge detection when the video input level is between 0. 5VP-Pand 2VP-P(sync tip amplitude 143mV to 572mV). A single external resistor sets all internal timing to adjust for various video standards. The composite sync output follows video in sync pulses and a vertical sync pulse is output on the rising edge of the first vertical serration following the vertical pre-equalizing string. For non-standard vertical inputs, a default vertical pulse is output when the vertical signal stays low for longer than the vertical sync default delay time. The horizontal output gives horizontal timing with pre/post equalizing pulses. The EL1883 is available in an 8-pin SO package and is specified for operation over the full -40°C to +85°C temperature range.