FIN10473.3V LVDS 4-Bit Flow-Through High Speed Differential Driver | Interface | 2 | Active | This quad driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV which provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data. The FIN1047 can be paired with its companion receiver, the FIN1048, or any other LVDS receiver. |
| Interface | 1 | Obsolete | |
FIN1049LVDS Dual Line Driver with Dual Line Receiver | Drivers, Receivers, Transceivers | 3 | Active | This dual driver-receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver accepts LVTTL inputs and translates them to LVDS outputs. The receiver accepts LVDS inputs and translates them to LVTTL outputs. The LVDS levels have a typical differential output swing of 350mV which provides for low EMI at ultra-low power dissipation even at high frequencies. The FIN1049 can accept LVPECL inputs for translating from LVPECL to LVDS. The En and Enb inputs are ANDed together to enable/disable the outputs. The enables are common to all four outputs. A single-line driver and single-line receiver function is also available in the FIN1019. |
| Interface | 1 | Obsolete | |
| Signal Buffers, Repeaters, Splitters | 2 | Obsolete | |
FIN1104LVDS 4 Port High Speed Repeater | Signal Buffers, Repeaters, Splitters | 1 | Active | This 4 port repeater is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The FIN1104 accepts and outputs LVDS levels with a typical differential output swing of 330 mV which provides low EMI at ultra low power dissipation even at high frequencies. The FIN1104 provides a VBBreference for AC coupling on the inputs. In addition the FIN1104 can directly accept LVPECL, HSTL, and SSTL-2 for translation to LVDS. |
FIN1108LVDS 8 Port High Speed Repeater | Signal Buffers, Repeaters, Splitters | 2 | Active | This eight-port repeater is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The FIN1108 accepts and outputs LVDS levels with a typical differential output swing of 330mV, which provides low EMI at ultra-low power dissipation even at high frequencies. The FIN1108 provides a VBBreference for AC coupling on the inputs. In addition, the FIN1108 can directly accept LVPECL, HSTL, and SSTL-2 for translation to LVDS. |
FIN1215LVDS 21-Bit Serializers/De-Serializers | Serializers, Deserializers | 2 | Active | The FIN1217 and FIN1215 transform 21-bit wide parallel LVTTL (Low-Voltage TTL) data into three serial LVDS (Low-Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock, 21 bits of input LVTTL data are sampled and transmitted. The FIN1218 and FIN1216 receive and convert the three serial LVDS data streams back into 21 bits of LVTTL data. Table 1 provides a matrix summary of the serializers and de-serializers available. For the FIN1217, at a transmit clock frequency of 85MHz, 21 bits of LVTTL data are transmitted at a rate of 595Mbps per LVDS channel. These chipsets solve EMI and cable size problems associated with wide and high-speed TTL interfaces. |
FIN1216LVDS 21-Bit Serializers/De-Serializers | Serializers, Deserializers | 1 | Obsolete | The FIN1217 and FIN1215 transform 21-bit wide parallel LVTTL (Low-Voltage TTL) data into three serial LVDS (Low-Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock, 21 bits of input LVTTL data are sampled and transmitted. The FIN1218 and FIN1216 receive and convert the three serial LVDS data streams back into 21 bits of LVTTL data. Table 1 provides a matrix summary of the serializers and de-serializers available. For the FIN1217, at a transmit clock frequency of 85MHz, 21 bits of LVTTL data are transmitted at a rate of 595Mbps per LVDS channel. These chipsets solve EMI and cable size problems associated with wide and high-speed TTL interfaces. |
| Serializers, Deserializers | 2 | Obsolete | |