PACDN044Transient Voltage Suppressor Array | TVS Diodes | 3 | Obsolete | The PACDN042/43/44/45/46 family of transient voltage suppressor arrays provide a very high level of protection for sensitive electronic components that may be subjected to electrostatic discharge (ESD). The PACDN042/43/44/45/46 devices safely dissipate ESD strikes, exceeding the IEC 61000-4-2 International Standard, Level 4 (±8 kV contact discharge). All pins are rated to withstand ±20 kV ESD pulses using the IEC 61000-4-2 contact discharge method. Using the MIL-STD-883D (Method 3015 specification for Human Body Model (HBM) ESD, all pins are protected from contact discharges of greater than ±30 kV. |
PACDN046Transient Voltage Suppressor Array | TVS Diodes | 1 | Obsolete | The PACDN042/43/44/45/46 family of transient voltage suppressor arrays provide a very high level of protection for sensitive electronic components that may be subjected to electrostatic discharge (ESD). The PACDN042/43/44/45/46 devices safely dissipate ESD strikes, exceeding the IEC 61000-4-2 International Standard, Level 4 (±8 kV contact discharge). All pins are rated to withstand ±20 kV ESD pulses using the IEC 61000-4-2 contact discharge method. Using the MIL-STD-883D (Method 3015 specification for Human Body Model (HBM) ESD, all pins are protected from contact discharges of greater than ±30 kV. |
| Transient Voltage Suppressors (TVS) | 1 | Obsolete | PACDN1404 and PACDN1408 are 4-and 8-channel ESD arrays that provide a very high level of protection for sensitive electronic components that may be subjected to ESD. |
| Transient Voltage Suppressors (TVS) | 1 | Obsolete | PACDN1404 and PACDN1408 are 4-and 8-channel transient voltage suppressor arrays that provide a very high level of protection for sensitive electronic components that may be subjected to ESD. |
PACSZ1284IEEE 1284 Parallel Port ESD/EMI/Termination Network | EMI/RFI Filters (LC, RC Networks) | 2 | Obsolete | PACSZ1284 combines EMI filtering, ESD protection, and signal termination in a single QSOP package for parallel port interfaces complying to the IEEE 1284 standard. The PACSZ1284 provides a complete parallel port termination solution. It integrates the equivalent of 60 discrete components, making it ideal for space critical applications. |
| Integrated Circuits (ICs) | 5 | Obsolete | |
PACVGA105ESD Protection Diodes, VGA Port Companion Circuit | PMIC | 3 | Obsolete | The PACVGA105 incorporates 7 channels of ESD protection for signal lines commonly found in a VGA port for PCs. ESD protection is implemented with current steering diodes designed to safely handle the high peak surge currents associated with the IEC-61000-4-2 Level-4 ESD Protection Standard (±8kV contact discharge). When the channels are subjected to an electrostatic discharge, the ESD current pulse is diverted via the protection diodes into the positive supply rails or ground where they may be safely dissipated. The upper ESD diodes for the R, G and B channels are connected to a separate supply rail (VRGB) to facilitate interfacing to graphics controller ICs with low voltage supplies. The remaining channels are connected to the main 5V rail (VCC). The lower diodes for the R, G and B channels are also connected to a dedicated ground pin (GNDA) to minimize crosstalk due to common ground impedance. Two non-inverting buffers are also included in this IC for buffering the HSYNC and VSYNC signals from the graphics controller IC. These buffers will accept TTL input levels and convert them to CMOS output levels that swing between GND and VCC. These drivers have a nominal 60Ω output impedance to match the characteristic impedance of the HSYNC and VSYNC lines of the video cables typically used. The inputs of these drivers also have high impedance pull-ups (50kW nom.) pulling up to the VAUX rail. In addition, the DDC_CLOCK and DDC_DATA channels have 1.8kΩ resistors pulling these inputs up to the main 5V (VCC) rail. |
| Integrated Circuits (ICs) | 3 | Obsolete | |
| Interface | 4 | Obsolete | |
PCA9654EI/O Expander, I<sup>2</sup>C / SMBus, 8-bit, with Interrupt | I/O Expanders | 1 | Obsolete | The PCA9654E provides 8 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C−bus/SMBus applications.The PCA9654E consists of 8−bit Configuration (Input or Output selection); Input, Output and Polarity Inversion (active HIGH or active LOW operation) registers. The system master may set the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion register. All registers can be read by the system master.The PCA9654E open−drain interrupt (INTb) output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. The power−on reset sets the registers to their default values and initializes the device state machine.Three hardware pins (AD0, AD1, AD2) vary the fixed I2C bus address and allow up to 64 devices to share the same I2C−bus/SMBus. |
