| Logic | 1 | Active | The 74HC7541-Q100; 74HCT7541-Q100 is an 8-bit buffer/line driver with Schmitt-trigger inputs and 3-state outputs. The device features two output enables (OE1 andOE2). A HIGH onOEn causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals. |
74HC7541PWOctal Schmitt trigger buffer/line driver; 3-state | Integrated Circuits (ICs) | 1 | Active | The 74HC7541; 74HCT7541 is an 8-bit buffer/line driver with Schmitt-trigger inputs and 3-state outputs. The device features two output enables (OE1 andOE2). A HIGH onOEn causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals. |
| Buffers, Drivers, Receivers, Transceivers | 1 | Active | The 74HC7541-Q100; 74HCT7541-Q100 is an 8-bit buffer/line driver with Schmitt-trigger inputs and 3-state outputs. The device features two output enables (OE1 andOE2). A HIGH onOEn causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals. |
74HC75DQuad bistable transparent latch | Integrated Circuits (ICs) | 1 | Active | The 74HC75 is a quad bistable transparent latch with complementary outputs. Two latches are simultaneously controlled by one of two active HIGH enable inputs (LE12 and LE34). When LEnn is HIGH, the data enters the latches and appears at the nQ outputs. The nQ outputs follow the data inputs (nD) as long as LEnn is HIGH (transparent). The data on the nD inputs one set-up time prior to the HIGH-to-LOW transition of the LEnn will be stored in the latches. The latched outputs remain stable as long as the LEnn is LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
| Logic | 1 | Active | The 74HC75-Q100 is a quad bistable transparent latch with complementary outputs. Two latches are simultaneously controlled by one of two active HIGH enable inputs (LE12 and LE34). When LEnn is HIGH, the data enters the latches and appears at the nQ outputs. The nQ outputs follow the data inputs (nD) as long as LEnn is HIGH (transparent). The data on the nD inputs one set-up time prior to the HIGH-to-LOW transition of the LEnn will be stored in the latches. The latched outputs remain stable as long as the LEnn is LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
| Logic | 1 | Obsolete | |
| Integrated Circuits (ICs) | 1 | Active | The 74HC85; 74HCT85 is a 4-bit magnitude comparator that can be expanded to almost any length. They perform comparison of two 4-bit binary, BCD or other monotonic codes and present the three possible magnitude results at the outputs (QA>B, QA=Band QA<B). The 4-bit inputs are weighted (A0 to A3 and B0 to B3), where A3 and B3 are the most significant bits. For proper compare operation the expander inputs (IA>B, IA=Band IA<B) to the least significant position must be connected as follows: IA<B= IA>B= LOW and IA=B= HIGH. For words greater than 4-bits, units can be cascaded by connecting outputs QA>B, QA=Band QA<Bto the corresponding inputs of the significant comparator. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
| Comparators | 1 | Active | The 74HC85; 74HCT85 is a 4-bit magnitude comparator that can be expanded to almost any length. They perform comparison of two 4-bit binary, BCD or other monotonic codes and present the three possible magnitude results at the outputs (QA>B, QA=Band QA<B). The 4-bit inputs are weighted (A0 to A3 and B0 to B3), where A3 and B3 are the most significant bits. For proper compare operation the expander inputs (IA>B, IA=Band IA<B) to the least significant position must be connected as follows: IA<B= IA>B= LOW and IA=B= HIGH. For words greater than 4-bits, units can be cascaded by connecting outputs QA>B, QA=Band QA<Bto the corresponding inputs of the significant comparator. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
74HC86Quad 2-input EXCLUSIVE-OR gate | Logic | 5 | Active | The 74HC86-Q100; 74HCT86-Q100 is a quad 2-input EXCLUSIVE-OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
| Gates and Inverters | 1 | Obsolete | |
